Multilayer ceramic capacitor and circuit board

US2023268132A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2023268132-A1
Application numberUS-202318169612-A
CountryUS
Kind codeA1
Filing dateFeb 15, 2023
Priority dateFeb 22, 2022
Publication dateAug 24, 2023
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer ceramic capacitor includes a ceramic body and first to fourth external electrodes. The ceramic body has first to fourth side surfaces, first to fourth ridges connecting the two side surfaces, and first and second internal electrodes. External electrodes cover the respective ridges and are connected to internal electrodes. The multilayer ceramic capacitor has a height dimension T of 110 μm or less, and a ratio of a width dimension W to a length dimension L of 0.5 or more and less than 0.85. The internal electrodes extend obliquely outward relative to the X-axis and Y-axis directions from the facing portions, and have lead-out portions towards the ridges.

First claim

Opening claim text (preview).

What is claimed is: 1 . A multilayer ceramic capacitor, comprising: a ceramic body having: first and second main surfaces perpendicular to a first axis; first and second side surfaces perpendicular to a second axis orthogonal to the first axis; third and fourth side surfaces perpendicular to a third axis orthogonal to the first axis and the second axis; a first ridge connecting the first and fourth side surfaces; a second ridge connecting the second and third side surfaces; a third edge connecting the first and third side surfaces; and a fourth ridge connecting the second and fourth side surfaces, the ceramic body including first and second internal electrodes alternately stacked in a direction of the first axis via ceramic layers in between; and first and second external electrodes covering the first and second ridges, respectively, of the ceramic body and connected to the first internal electrodes; and third and fourth external electrodes covering the third and fourth ridges, respectively, of the ceramic body and connected to the second internal electrodes, wherein a first dimension, which is a maximum dimension of the multilayer ceramic capacitor in the direction of the first axis, is 110 μm or less, wherein a ratio of a third dimension, which is a maximum dimension of the multilayer ceramic capacitor in a direction of the third axis, to a second dimension, which is a maximum dimension of the multilayer ceramic capacitor in a direction of the second axis, is 0.5 or more and less than 0.85, wherein the first internal electrode includes a first facing portion facing the second internal electrode in the direction of the first axis; and a pair of first lead-out portions extending obliquely outward from the first facing relative to the directions of the second and third axes towards the first and second ridges, respectively, of the ceramic body so as to be connected to the first and second external electrodes, and wherein the second internal electrode includes a second facing portion facing the first facing portion in the direction of the first axis; and a pair of second lead-out portions extending obliquely outward from the second facing portion relative to the directions of the second and third axes towards the third and fourth ridges, respectively, of the ceramic body so as to be connected to the third and fourth external electrodes. 2 . The multilayer ceramic capacitor according to claim 1 , wherein each of the pair of first lead-out portions has a pair of first side edge portions extending outward obliquely relative to the directions of the second and third axes from the first facing portion toward two side surfaces connected by the corresponding first or second ridge, and wherein each of the pair of second lead-out portions has a pair of second side edge portions extending outward obliquely relative to the directions of the second and third axes from the second facing portion toward two side surfaces connected by the corresponding third or fourth ridge. 3 . The multilayer ceramic capacitor according to claim 2 , wherein said pair of first side edge portions extend substantially parallel to each other, and wherein said pair of second side edge portions extend substantially parallel to each other. 4 . The multilayer ceramic capacitor according to claim 1 , wherein the second dimension is 1000 μm or less. 5 . The multilayer ceramic capacitor according to claim 1 , wherein a ratio of a minimum distance in the direction of the second axis between the first and fourth external electrodes adjacent to each other in the direction of the second axis to the second dimension is 0.05 or more and 0.95 or less. 6 . The multilayer ceramic capacitor according to claim 1 , wherein a ratio of a minimum distance in the direction of the third axis between the first and third external electrodes adjacent to each other in the direction of the third axis to the third dimension is 0.05 or more and 0.95 or less. 7 . The multilayer ceramic capacitor according to claim 1 , wherein a projection dimension of the first external electrode from the first side surface in the direction of the second axis is 3 μm or more and 30 μm or less. 8 . A circuit board, comprising: a substrate having a mounting surface; and a multilayer ceramic capacitor mounted on the mounting surface of the substrate so as to face the mounting surface in a direction of a first axis, wherein the multilayer ceramic capacitor includes: a ceramic body having: first and second main surfaces perpendicular to the first axis; first and second side surfaces perpendicular to a second axis orthogonal to the first axis; third and fourth side surfaces perpendicular to a third axis orthogonal to the first axis and the second axis; a first ridge connecting the first and fourth side surfaces; a second ridge connecting the second and third side surfaces; a third edge connecting the first and third side surfaces; and a fourth ridge connecting the second and fourth side surfaces, the ceramic body including first and second internal electrodes alternately stacked in a direction of the first axis via ceramic layers in between; and first and second external electrodes covering the first and second ridges, respectively, of the ceramic body and connected to the first internal electrodes; and third and fourth external electrodes covering the third and fourth ridges, respectively, of the ceramic body and connected to the second internal electrodes, wherein a first dimension, which is a maximum dimension of the multilayer ceramic capacitor in the direction of the first axis, is 110 μm or less, wherein a ratio of a third dimension, which is a maximum dimension of the multilayer ceramic capacitor in a direction of the third axis, to a second dimension, which is a maximum dimension of the multilayer ceramic capacitor in a direction of the second axis, is 0.5 or more and less than 0.85, wherein the first internal electrode includes a first facing portion facing the second internal electrode in the direction of the first axis; and a pair of first lead-out portions extending obliquely outward from the first facing relative to the directions of the second and third axes towards the first and second ridges, respectively, of the ceramic body so as to be connected to the first and second external electrodes, and wherein the second internal electrode includes a second facing portion facing the first facing portion in the direction of the first axis; and a pair of second lead-out portions extending obliquely outward from the second facing portion relative to the directions of the second and third axes towards the third and fourth ridges, respectively, of the ceramic body so as to be connected to the third and fourth external electrodes.

Assignees

Inventors

Classifications

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • Form of non-self-supporting electrodes · CPC title

  • for surface mounting, e.g. chip capacitors · CPC title

  • electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

  • characterised by the ceramic dielectric material (H01G4/1272, H01G4/1281 take precedence) · CPC title

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What does patent US2023268132A1 cover?
A multilayer ceramic capacitor includes a ceramic body and first to fourth external electrodes. The ceramic body has first to fourth side surfaces, first to fourth ridges connecting the two side surfaces, and first and second internal electrodes. External electrodes cover the respective ridges and are connected to internal electrodes. The multilayer ceramic capacitor has a height dimension T of…
Who is the assignee on this patent?
Taiyo Yuden Kk
What technology area does this patent fall under?
Primary CPC classification H01G4/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 24 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).