Switching regulator and operating method

US2023238888A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2023238888-A1
Application numberUS-202318130006-A
CountryUS
Kind codeA1
Filing dateApr 3, 2023
Priority dateOct 16, 2020
Publication dateJul 27, 2023
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A switching regulator generates an output voltage from an input voltage and includes; a charge sharing circuit that selectively forms one of a first charge sharing path between a first flying capacitor and a second bootstrap capacitor and a second charge sharing path between a second flying capacitor and a first bootstrap capacitor based on first and second conversion modes.

First claim

Opening claim text (preview).

What is claimed is: 1 . A switching regulator that generates an output voltage from an input voltage, the switching regulator comprising: a first switching circuit including a first transistor that is connected to a first node receiving the input voltage in response to a first switching control signal in a boost mode; a second switching circuit including a second transistor that is connected to a second node outputting the output voltage in response to a second switching control signal in a buck mode; and a charge sharing circuit configured to form a second charge sharing path for boosting the first switching control signal in the boost mode and a first charge sharing path for boosting the second switching control signal in the buck mode. 2 . The switching regulator of claim 1 , wherein the first transistor is configured to selectively connect the first node in response to the first switching control signal, in the buck mode, and the second transistor is configured to selectively connect the second node in response to the second switching control signal, in the boost mode. 3 . The switching regulator of claim 1 , wherein the first and second transistor comprise an n-channel metal oxide semiconductor (nMOS) transistor. 4 . The switching regulator of claim 1 , wherein the first switching circuit further comprises a first bootstrap capacitor that is charged through the second charge sharing path to boost the first switching control signal, and the second switching circuit further comprises a second bootstrap capacitor that is charged by through the first charge sharing path to boost the second switching control signal. 5 . The switching regulator of claim 1 , wherein the first switching circuit further comprises a first flying capacitor that is discharged through the first charge sharing path, and the second switching circuit comprises a second flying capacitor that is discharged through the second charge sharing path. 6 . The switching regulator of claim 1 , wherein the first switching circuit further comprises a first flying capacitor, in a first section of the buck mode, the first flying capacitor is connected to the first node to be charged, and in a second section of the buck mode, the first flying capacitor is discharged through the first charge sharing path. 7 . The switching regulator of claim 1 , wherein the second switching circuit further comprises a second flying capacitor, in a first section of the boost mode, the second flying capacitor is connected to the first node to be charged, and in a second section of the boost mode, the second flying capacitor is discharged through the second charge sharing path. 8 . The switching regulator of claim 1 , wherein the first switching circuit further comprises a first bootstrap capacitor that boosts the first switching control signal in the boost mode, and in the boost mode, the first bootstrap capacitor is periodically charged through the second charge sharing path. 9 . The switching regulator of claim 1 , wherein the second switching circuit further comprises a second bootstrap capacitor that boosts the second switching control signal in in the buck mode, and in the buck mode, the second bootstrap capacitor is periodically charged through the first charge sharing path. 10 . The switching regulator of claim 1 , wherein the charge sharing circuit comprises: at least one first power switching element configured to form or block the first charge sharing path; and at least one second power switching element configured to form or block the second charge sharing path. 11 . The switching regulator of claim 1 , wherein a direction in which charges flow in the first charge sharing path is different from a direction in which charges flow in the second charge sharing path. 12 . A switching regulator that generates an output voltage from an input voltage, the switching regulator comprising: a first switching circuit including a first transistor, a first bootstrap capacitor, and a flying capacitor, wherein in a buck mode, the first transistor is configured to selectively connect a first node receiving the input voltage in response to a first switching control signal the input voltage; a second switching circuit including a second transistor and a second bootstrap capacitor, wherein in the buck mode, the second transistor is configured to selectively connect a second node outputting the output voltage in response to a second switching control signal; and a charge sharing circuit configured to form a charge sharing path between the flying capacitor and the second bootstrap capacitor, in the buck mode. 13 . The switching regulator of claim 12 , wherein in a first section of the buck mode, the flying capacitor is connected to the first node to be charged, and in a second section of the buck mode, the flying capacitor is discharged through the charge sharing path. 14 . The switching regulator of claim 13 , wherein the charge sharing path is blocked in the first section, and the charge sharing path is formed in the second section. 15 . The switching regulator of claim 12 , wherein in a first section of the buck mode, the first bootstrap capacitor is connected to the first node to be charged, and in a second section of the buck mode, the first bootstrap capacitor boosts the first switching control signal. 16 . The switching regulator of claim 12 , wherein in the buck mode, the second bootstrap capacitor is periodically charged through the charge sharing path. 17 . A switching regulator that generates an output voltage from an input voltage, the switching regulator comprising: a first switching circuit including a first transistor and a first bootstrap capacitor, wherein in a boost mode, the first transistor connects a first node receiving the input voltage in response to a first switching control signal, and the first bootstrap capacitor boosts the first switching control signal; a second switching circuit including a second transistor, a second bootstrap capacitor, and a flying capacitor, wherein in the boost mode, the second transistor is configured to selectively connect a second node outputting the output voltage in response to a second switching control signal; and a charge sharing circuit configured to form a charge sharing path between the flying capacitor and the first bootstrap capacitor, in the boost mode. 18 . The switching regulator of claim 17 , wherein in a first section of the boost mode, the flying capacitor is connected to the first node to be charged, and in a second section of the boost mode, the flying capacitor is discharged through the charge sharing path. 19 . The switching regulator of claim 17 , wherein in a first section of the boost mode, the second bootstrap capacitor is connected to the first node to be charged, and in a second section of the boost mode, the second bootstrap capacitor boosts the second switching control signal. 20 . The switching regulator of claim 17 , wherein in the boost mode, the first bootstrap capacitor is periodically charged through the charge sharing path. 21 . A switching regulator that generates an output voltage from an input voltage, the switching regulator comprising: a first switching circuit including a first transistor connected to a first node receiving the input voltage based on a first switching control signal; a second switching circuit including a second transistor connected to a second node outputting the output voltage

Assignees

Inventors

Classifications

  • H02M3/1582Primary

    Buck-boost converters (H02M3/1584 takes precedence) · CPC title

  • using capacitors or batteries which are alternately charged and discharged, e.g. charged in parallel and discharged in series · CPC title

  • H02M3/155Primary

    using semiconductor devices only · CPC title

  • using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

  • Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck · CPC title

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What does patent US2023238888A1 cover?
A switching regulator generates an output voltage from an input voltage and includes; a charge sharing circuit that selectively forms one of a first charge sharing path between a first flying capacitor and a second bootstrap capacitor and a second charge sharing path between a second flying capacitor and a first bootstrap capacitor based on first and second conversion modes.
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H02M3/1582. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jul 27 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).