Digital slope analog to digital converter and signal conversion method

Patent metadata

Field	Value
Publication number	US-2023188157-A1
Application number	US-202217944340-A
Country	US
Kind code	A1
Filing date	Sep 14, 2022
Priority date	Dec 9, 2021
Publication date	Jun 15, 2023
Grant date	—

Abstract

A digital slope analog to digital converter includes a charge injection digital to analog converter (DAC) circuit, a comparator circuit, a detector circuit, and a control logic circuitry. The charge injection DAC circuit respectively samples input signals via first and second capacitors and generates a first signal via the first capacitor and a second signal via the second capacitor. The comparator circuit compares the first signal with the second signal to generate decision signals. The detector circuit generates a flag signal according to the decision signals. The control logic circuitry generates an enable signal according to the flag signal and generates a digital output when the comparator circuit detects a crossing point of the first and second signals. The charge injection DAC circuit gradually adjusts charges stored in the first and/or the second capacitor according to the enable signal until the crossing point is detected.

First claim

What is claimed is:

1 . A digital slope analog to digital converter, comprising:
a charge injection digital to analog converter circuit comprising a first capacitor and a second capacitor, the charge injection digital to analog converter circuit configured to respectively sample a first input signal and a second input signal via the first capacitor and the second capacitor, and generate a first signal via the first capacitor and a second signal via the second capacitor; a comparator circuit configured to compare the first signal with the second signal to generate a plurality of decision signals; a detector circuit configured to generate a flag signal according to the plurality of decision signals; and a control logic circuitry configured to generate an enable signal according to the flag signal, and generate a digital output when the comparator circuit detects a crossing point of the first signal and the second signal, wherein the charge injection digital to analog converter circuit is further configured to gradually adjust charges stored in at least one of the first capacitor or the second capacitor according to the enable signal until the comparator circuit detects the crossing point.

2 . The digital slope analog to digital converter of claim 1 , wherein the charge injection digital to analog converter circuit is configured to determine whether to adjust the charges stored in the first capacitor or the second capacitor according to the plurality of decision signals corresponding to an initial comparison result of the first signal and the second signal.

3 . The digital slope analog to digital converter of claim 1 , wherein if an initial comparison result that is performed after the first input signal and the second input signal are sampled indicates that a level of the first input is higher than a level of the second signal, the charge injection digital to analog converter circuit is configured to gradually discharge the first capacitor according to the plurality of decision signals.

4 . The digital slope analog to digital converter of claim 1 , wherein the control logic circuitry is configured to perform a couniting operation according to the flag signal until the comparator circuit detects the crossing point to generate a count value, and encode the count value to generate the digital output.

5 . The digital slope analog to digital converter of claim 1 , wherein the charge injection digital to analog converter circuit further comprises:
a charge injection circuit configured to gradually adjust the charges stored in the at least one of the first capacitor or the second capacitor according to the enable signal and the plurality of decision signals.

6 . The digital slope analog to digital converter of claim 5 , wherein the charge injection circuit comprises:
a control circuit configured to generate a switching signal according to the enable signal and the plurality of decision signals; a switching circuit configured to be selectively connected to the first capacitor or the second capacitor according to the switching signal; and a current source circuit configured to discharge the first capacitor or the second capacitor via the switching circuit.

7 . The digital slope analog to digital converter of claim 1 , wherein a number of a current source circuit for adjusting the first capacitor or the second capacitor in the charge injection digital to analog converter circuit is 1.

8 . The digital slope analog to digital converter of claim 1 , wherein the charge injection digital to analog converter circuit further comprises:
a plurality of charge injection circuits configured to discharge one of the first capacitor and the second capacitor and charge another one of the first capacitor and the second capacitor according to the enable signal and the plurality of decision signals.

9 . A signal conversion method, comprising:
respectively sampling, by a first capacitor and a second capacitor, a first input signal and a second input signal, and generating a first signal via the first capacitor and a second signal via the second capacitor; comparing the first signal with the second signal to generate a plurality of decision signals; generating an enable signal according to the plurality of decision signals; gradually adjusting, by a charge injection digital to analog converter circuit, charges stored in at least one of the first capacitor or the second capacitor according to the enable signal until a crossing point of the first signal and the second signal is detected; and generating a digital output when the crossing point is detected.

10 . The signal conversion method of claim 9 , wherein gradually adjusting, by the charge injection digital to analog converter circuit, the charges stored in at least one of the first capacitor or the second capacitor according to the enable signal until the crossing point of the first signal and the second signal is detected comprises:
determining whether to adjust the charges stored in the first capacitor or the second capacitor according to the plurality of decision signals corresponding to an initial comparison result of the first signal and the second signal.

11 . The signal conversion method of claim 9 , wherein a number of a current source circuit for adjusting the first capacitor or the second capacitor in the charge injection digital to analog converter circuit is 1.

12 . The signal conversion method of claim 9 , wherein gradually adjusting, by the charge injection digital to analog converter circuit, the charges stored in at least one of the first capacitor or the second capacitor according to the enable signal until the crossing point of the first signal and the second signal is detected comprises:
if an initial comparison result that is performed after the first input signal and the second input signal are sampled indicates that a level of the first input is higher than a level of the second signal, gradually discharging, by the charge injection digital to analog converter circuit, the first capacitor according to the plurality of decision signals.

13 . The signal conversion method of claim 9 , wherein generating the enable signal according to the plurality of decision signals;
generating a flag signal according to the plurality of decision signals; and generating the enable signal according to the flag signal.

14 . The signal conversion method of claim 13 , wherein generating the digital output when the crossing point is detected comprises:
performing a counting operation according to the flag signal until the crossing point is detected, in order to generate a count value; and encoding the count value to generate the digital output.

15 . The signal conversion method of claim 9 , wherein gradually adjusting, by the charge injection digital to analog converter circuit, the charges stored in at least one of the first capacitor or the second capacitor according to the enable signal until the crossing point of the first signal and the second signal is detected comprises:
generating, by a control circuit of the charge injection digital to analog converter circuit, a switching signal according to the enable signal and the plurality of decision signals; selectively connecting a switching circuit of the charge injection digital to analog converter circuit to the first capacitor or the second capacitor according to the switching signal; and discharging, by a current source of the charge injection digital to analog converter circuit, the first capacitor or the second capacitor via the switching circuit.

16 . The signal

Assignees

• Realtek Semiconductor Corp

Inventors

• Huang Shih-Hsiung
• Hong Wei-Cian
• Shih Sheng-Yen

Classifications

• H03M1/804 Primary

  with charge redistribution · CPC title

• H03M1/825

  by comparing the input signal with a digital ramp signal · CPC title

• H03M1/56 Primary

  Input signal compared with linear ramp · CPC title

• H03M1/742

  using current sources as quantisation value generators · CPC title