Touch display apparatus and test driving method for the same

US2023141463A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2023141463-A1
Application numberUS-202218048865-A
CountryUS
Kind codeA1
Filing dateOct 24, 2022
Priority dateNov 10, 2021
Publication dateMay 11, 2023
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A touch display apparatus is disclosed, which includes a touch display panel with an active area and a peripheral area. The touch display panel includes a substrate, touch electrodes, touch sensing lines, dummy touch sensing lines and transistors. The touch electrodes are disposed on the substrate and in the active area. Each touch sensing line is electrically connected to one of the touch electrodes. The touch sensing lines and the dummy touch sensing lines are in parallel with each other in the active area. The dummy touch sensing lines are electrically connected with each other. Each transistor has a first terminal, a second terminal and a control terminal. The first terminals of the transistors are electrically connected with each other, the second terminal of each transistor is electrically connected to one of the touch sensing lines, and the control terminals of the transistors are electrically connected with each other.

First claim

Opening claim text (preview).

What is claimed is: 1 . A touch display apparatus having a touch display panel with an active area and a peripheral area, the touch display panel comprising: a substrate; a plurality of touch electrodes disposed on the substrate and in the active area; a plurality of touch sensing lines disposed on the substrate, each touch sensing line electrically connected to a corresponding one of the touch electrodes; a plurality of dummy touch sensing lines disposed on the substrate, and the dummy touch sensing lines electrically connected with each other; and a plurality of first transistors disposed on the substrate and in the peripheral area, each of the first transistors having a first terminal, a second terminal and a control terminal, the first terminals of the first transistors electrically connected with each other, the second terminal of each of the first transistors electrically connected to a corresponding one of the touch sensing lines, and the control terminals of the first transistors electrically connected with each other. 2 . The touch display apparatus of claim 1 , wherein the touch display panel further comprises a potential line disposed on the substrate and in the peripheral area, the potential line electrically connected to the dummy touch sensing lines. 3 . The touch display apparatus of claim 2 , wherein the potential line surrounds the active area. 4 . The touch display apparatus of claim 2 , wherein during an image display test period of the touch display panel, the control terminals of the first transistors are configured to receive an enabling signal to turn on the first transistors, and the first terminals of the first transistors and the potential line are configured to receive a common voltage signal. 5 . The touch display apparatus of claim 4 , wherein the touch display panel further comprises: a first test pad, a second test pad and a third test pad disposed on the substrate and in the peripheral area, wherein the first test pad is electrically connected to the first terminals of the first transistors, the second test pad is electrically connected to the potential line, and the third test pad is electrically connected to the control terminals of the first transistors; wherein during the image display test period of the touch display panel, a test machine transmits the common voltage signal to the first test pad and the second test pad and transmits the enabling signal to the third test pad. 6 . The touch display apparatus of claim 2 , wherein the touch display panel further comprises: a second transistor disposed on the substrate and in the peripheral area, the second transistor having a first terminal, a second terminal and a control terminal, wherein the second terminal of the second transistor is electrically connected to the potential line. 7 . The touch display apparatus of claim 6 , wherein during an image display test period of the touch display panel, the control terminals of the first transistors and the control terminal of the second transistor are configured to receive an enabling signal to turn on the first transistors and the second transistor, and the first terminals of the first transistors and the first terminal of the second transistor are configured to receive a common voltage signal. 8 . The touch display apparatus of claim 7 , wherein the touch display panel further comprises: a first test pad, a second test pad and a third test pad disposed on the substrate and in the peripheral area, wherein the first test pad is electrically connected to the first terminals of the first transistors, the second test pad is electrically connected to the first terminal of the second transistor, and the third test pad is electrically connected to the control terminals of the first transistors and the control terminal of the second transistor; wherein during the image display test period of the touch display panel, a test machine transmits the common voltage signal to the first test pad and the second test pad and transmits the enabling signal to the third test pad. 9 . The touch display apparatus of claim 1 , wherein the touch display panel further comprises: a plurality of first bonding pads and a second bonding pad disposed on the substrate and in the peripheral area; wherein each first bonding pad is electrically connected to a corresponding one of the touch sensing lines, and the second bonding pad is electrically connected to the dummy touch sensing lines. 10 . The touch display apparatus of claim 9 , further comprising: a driver chip electrically connected to the first bonding pads and the second bonding pad; wherein during a display period of the touch display apparatus, the driver chip is configured to transmit a common voltage signal to the first bonding pads and the second bonding pad. 11 . The touch display apparatus of claim 10 , wherein during a touch sensing period of the touch display apparatus, the driver chip is configured to transmit a plurality of touch sensing signals to the first bonding pads. 12 . The touch display apparatus of claim 1 , wherein the touch display panel further comprises: a plurality of data lines and a plurality of subpixels disposed on the substrate and in the active area, each subpixel electrically connected to a corresponding one of the data lines; and a plurality of third transistors disposed on the substrate and in the peripheral area, each third transistor having a first terminal, a second terminal and a control terminal, wherein the first terminals of the third transistors are electrically connected with each other, the second terminal of each third transistor is electrically connected to a corresponding one of the data lines, and the control terminals of the third transistors are electrically connected with each other. 13 . The touch display apparatus of claim 12 , wherein six of the data lines are sequentially arranged in a direction, one of the touch sensing lines or one of the dummy touch sensing lines is disposed between three of the six data lines and the others of the six data lines. 14 . The touch display apparatus of claim 12 , wherein one of the touch sensing lines or one of the dummy touch sensing lines is disposed between adjacent two of the data lines. 15 . The touch display apparatus of claim 12 , wherein during an image display test period of the touch display panel, the control terminals of the first transistors and the control terminals of the third transistors are configured to receive an enabling signal to turn on the first transistors and the third transistors, the first terminals of the first transistors are configured to receive a common voltage signal, and the first terminals of the third transistors are configured to receive a data test signal. 16 . The touch display apparatus of claim 15 , wherein the touch display panel further comprises: a first test pad, a second test pad, a third test pad and a fourth test pad disposed on the substrate and in the peripheral area, wherein the first test pad is electrically connected to the first terminals of the first transistors, the second test pad is electrically connected to the dummy touch sensing lines, the third test pad is electrically connected to the control terminals of the first transistors and the control terminals of the third transistors, and the fourth test pad is electrically connected to the first terminals of the third transistors; wherein during the image display test period of the touch display panel, a test machine transmits the common voltage signal to the first test pad and the second test pad and tra

Assignees

Inventors

Classifications

  • using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes · CPC title

  • G06F3/0412Primary

    Digitisers structurally integrated in a display · CPC title

  • Control or interface arrangements specially adapted for digitisers · CPC title

  • using a single layer of sensing electrodes · CPC title

  • Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means · CPC title

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What does patent US2023141463A1 cover?
A touch display apparatus is disclosed, which includes a touch display panel with an active area and a peripheral area. The touch display panel includes a substrate, touch electrodes, touch sensing lines, dummy touch sensing lines and transistors. The touch electrodes are disposed on the substrate and in the active area. Each touch sensing line is electrically connected to one of the touch elec…
Who is the assignee on this patent?
Hannstar Display Corp
What technology area does this patent fall under?
Primary CPC classification G06F3/0412. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu May 11 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).