Texture recognition assembly, manufacturing method thereof, and display device
US-2023255088-A1 · Aug 10, 2023 · US
US2023090555A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2023090555-A1 |
| Application number | US-202117613039-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jan 29, 2021 |
| Priority date | Jan 29, 2021 |
| Publication date | Mar 23, 2023 |
| Grant date | — |
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The present disclosure provides an array substrate and a liquid crystal display panel, belonging to the file of display technology. The array substrate includes a base substrate, a first electrode, an insulating dielectric layer and a second electrode stacked in sequence; the second electrode is provided with at least one hollow hole, and the hollow hole is in a shape of convex polygon, circle or ellipse.
Opening claim text (preview).
What is claimed is: 1 . An array substrate, comprising: a base substrate, a first electrode, an insulating dielectric layer and a second electrode stacked in sequence; wherein the second electrode is provided with at least one hollow hole, and the hollow hole is in a shape of convex polygon, circle or ellipse. 2 . The array substrate according to claim 1 , wherein the hollow hole is in a shape of a regular polygon or a circle. 3 . The array substrate according to claim 2 , wherein the hollow hole is in a shape of a circle, a diameter of the hollow hole is in a range of 10 μm to 14 μm. 4 . The array substrate according to claim 2 , wherein the hollow hole is in a shape of a square, a size of an edge of the hollow hole is in a range of 9 μm to 13 μm. 5 . The array substrate according to claim 1 , wherein the hollow hole comprises first hollow holes, and a distance between two adjacent first hollow holes is in a range of 2 μm to 4 μm. 6 . The array substrate according to claim 5 , wherein the first hollow holes are arranged into at least one hollow hole row, and the hollow hole row comprises a plurality of the first hollow holes successively adjacent and arranged linearly along a first direction; the first direction is parallel to a plane where the base substrate is located. 7 . The array substrate according to claim 6 , wherein the first hollow holes are arranged into at least one hollow hole column, and the hollow hole column comprises a plurality of the first hollow holes successively adjacent and arranged linearly along a second direction; the second directions is parallel to the plane where the base substrate is located and intersect with the first direction. 8 . The array substrate according to claim 7 , wherein an included angle between the first direction and the second direction is 90° or 60°. 9 . The array substrate according to claim 7 , wherein the hollow hole is in a shape of a square; an included angle between an edge of the hollow hole and the first direction is in the range of 0° to 10°. 10 . The array substrate according to claim 7 , wherein an included angle between the first direction and the second direction is 90°; the hollow hole is in a shape of a square; a length of an edge of the hollow hole is 11 μm, a distance between centers of two adjacent first hollow holes is 14 μm. 11 . The array substrate according to claim 7 , wherein an included angle between the first direction and the second direction is 90°; the hollow hole is in a shape of a square; a length of an edge of the hollow hole is 9 μm, a distance between centers of two adjacent first hollow holes is 11 μm. 12 . The array substrate according to claim 7 , wherein an included angle between the first direction and the second direction is 60°; the hollow hole is in a shape of a square; a length of an edge of the hollow hole is 10 μm, a distance between centers of two adjacent first hollow holes is 13 μm. 13 . The array substrate according to claim 7 , wherein an included angle between the first direction and the second direction is 90°; the hollow hole is in a shape of a circle; a diameter of the hollow hole is 11 μm, a distance between centers of two adjacent first hollow holes is 14 μm. 14 . The array substrate according to claim 7 , wherein an included angle between the first direction and the second direction is 60°; the hollow hole is in a shape of a circle; a diameter of the hollow hole is 13 μm, a distance between centers of two adjacent first hollow holes is 16 μm. 15 . The array substrate according to claim 5 , wherein the hollow hole further comprises a second hollow hole, and the second hollow hole is disposed close to an outer edge of the second electrode; a distance between the second hollow hole and an adjacent first hollow hole is smaller than a distance between two adjacent first hollow holes. 16 . The array substrate according to claim 15 , wherein the first hollow holes are arranged into at least one hollow hole row and at least one hollow hole column; the hollow hole row comprises a plurality of first hollow holes that are successively adjacent and arranged linearly along a first direction; the hollow hole column comprises a plurality of first hollow holes that are successively adjacent and arranged linearly along a second direction; the first direction and the second direction are both parallel to a plane of the base substrate and intersect with each other; any second hollow hole and the first hollow holes in the hollow hole row are arranged in a straight line along the first direction, or any second hollow hole and the first hollow holes in the hollow hole column are arranged in a straight line along the second direction. 17 . The array substrate according to claim 1 , wherein both the first electrode and the second electrode are transparent electrodes. 18 . A liquid crystal display panel, comprising: an array substrate, the array substrate comprising: a base substrate, a first electrode, an insulating dielectric layer and a second electrode stacked in sequence; wherein the second electrode is provided with at least one hollow hole, and the hollow hole is in a shape of convex polygon, circle or ellipse; a color filter substrate disposed opposite to the array substrate to form a cell; a liquid crystal layer sandwiched between the array substrate and the color filter substrate. 19 . The liquid crystal display panel according to claim 18 , wherein liquid crystals in the liquid crystal layer are negative liquid crystals. 20 . The liquid crystal display panel according to claim 18 , wherein when no voltage is loaded between the first electrode and the second electrode, an included angle between a long axis of a liquid crystal molecule in the liquid crystal layer and a plane where the array substrate is located is in a range of 85° to 90°.
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