Semiconductor device packaging warpage control

Patent metadata

Field	Value
Publication number	US-2023066652-A1
Application number	US-202117412327-A
Country	US
Kind code	A1
Filing date	Aug 26, 2021
Priority date	Aug 26, 2021
Publication date	Mar 2, 2023
Grant date	—

Abstract

A method of manufacturing a carrier for semiconductor device packaging is provided. The method includes forming a carrier having a plurality of plateau regions separated by a plurality of channels. The carrier is configured and arranged to support a plurality of semiconductor die during a packaging operation. The plurality of channels is filled with a material configured to control warpage of the carrier.

First claim

What is claimed is:

1 . A method comprising:
forming a carrier having a plurality of plateau regions separated by a plurality of channels, the carrier configured and arranged to support a plurality of semiconductor die during a packaging operation; and filling the plurality of channels with a structural material, the structural material configured to control warpage of the carrier.

2 . The method of claim 1 , wherein a top surface of the structural material is substantially coplanar with a top surface of the plurality of plateau regions.

3 . The method of claim 1 , wherein forming the carrier further comprises removing carrier material to form the plurality of channels.

4 . The method of claim 3 , wherein the carrier material is removed by way of etching, sawing, laser ablation, or a combination thereof.

5 . The method of claim 1 , wherein forming the carrier further comprises adding material to a base portion of the carrier, the added material configured to form the plurality of plateau regions.

6 . The method of claim 5 , wherein the added material comprises a material different from the base portion of the carrier.

7 . The method of claim 1 , wherein the structural material has a coefficient of thermal expansion sufficient to maintain a substantially planar condition of the carrier during the packaging operation.

8 . The method of claim 1 , wherein the carrier comprises a metal, glass, quartz, or ceramic material.

9 . The method of claim 1 , wherein the carrier is further configured for attaching, by way of a releasable adhesive, the plurality of semiconductor die to the plurality of plateau regions during the packaging operation.

10 . An apparatus for manufacturing a packaged semiconductor device, the apparatus comprising:
a carrier having a plurality of plateau regions separated by a plurality of channels, the carrier configured and arranged to support a plurality of semiconductor die during a packaging operation; and a structural material disposed in the plurality of channels, the structural material configured to control warpage of the carrier.

11 . The apparatus of claim 10 , wherein a top surface of the structural material is substantially coplanar with a top surface of the plurality of plateau regions.

12 . The apparatus of claim 10 , wherein the plurality of channels are formed in the carrier by way of etching, sawing, laser ablation, or a combination thereof.

13 . The apparatus of claim 10 , wherein the structural material has a coefficient of thermal expansion sufficient to maintain a substantially planar condition of the carrier during the packaging operation.

14 . The apparatus of claim 10 , wherein the plurality of plateau regions comprises a material different from a base portion of the carrier.

15 . The apparatus of claim 10 , wherein the carrier comprises a metal, glass, quartz, or ceramic material.

16 . A method comprising:
forming a carrier having a plurality of vertical channels and a plurality of horizontal channels, the plurality of vertical channels and the plurality of horizontal channels configured and arranged to separate a plurality of plateau regions of the carrier; and filling the plurality of vertical channels and the plurality of horizontal channels with a structural material, the structural material configured to control warpage of the carrier during a packaging operation.

17 . The method of claim 16 , wherein the carrier is configured and arranged to support a plurality of semiconductor die during the packaging operation.

18 . The method of claim 16 , wherein forming the carrier further comprises removing carrier material by way of etching, sawing, laser ablation, or a combination thereof to form the plurality of vertical channels and the plurality of horizontal channels.

19 . The method of claim 16 , wherein a top surface of the structural material is substantially coplanar with a top surface of the plurality of plateau regions.

20 . The method of claim 16 , wherein the plurality of plateau regions comprises a material different from a base portion of the carrier.

Assignees

• Nxp Usa Inc

Inventors

• Gupta Vivek
• Vincent Michael B
• Hayes Scott M
• Gan Richard Te
• Gong Zhiwei

Classifications

• H10W99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10W74/014

  using batch processing · CPC title

• H10W70/68 Primary

  Shapes or dispositions thereof · CPC title

• H10W70/027

  Mechanical treatments, e.g. deforming, punching or cutting · CPC title

• H10W42/121 Primary

  protecting against mechanical damage (H10W76/00, H10W74/00 take precedence) · CPC title