Josephson transistor

Patent metadata

Field	Value
Publication number	US-2023060817-A1
Application number	US-202217823330-A
Country	US
Kind code	A1
Filing date	Aug 30, 2022
Priority date	Aug 31, 2021
Publication date	Mar 2, 2023
Grant date	—

Abstract

A Josephson transistor, this transistor comprising a source and a drain each comprising an electric charge reservoir in electrical contact with a semiconductor layer. Each reservoir comprises a lower face and a side face both buried inside the semiconductor layer, The lower face of each reservoir extends mainly in an intermediate plane parallel to the plane of a support, this intermediate plane being located between a lower plane and an upper plane that define the semiconductor layer. The side face of each reservoir extends mainly perpendicular to the plane of the support, this side face facing the corresponding side face of the other reservoir and being separated from this corresponding side face of the other reservoir by a channel located under a gate of this transistor.

First claim

1 . A Josephson transistor, this transistor comprising:
a stack comprising, in this order:
a support that extends mainly parallel to a plane called “plane of the support”,
a layer of electrically insulating material,
a semiconductor layer produced directly on the layer of electrically insulating material, this semiconductor layer having:
an upper face that extends in an upper plane parallel to the plane of the support, and
a lower face that extends in a lower plane parallel to the plane of the support, this lower face being located level with an interface between the semiconductor layer and the layer of electrically insulating material,

a gate located on the upper face of the semiconductor layer, the region of the semiconductor layer located under the gate being called “channel”, a source and a drain each comprising an electric charge reservoir in electrical contact with the semiconductor layer of the stack, these reservoirs each being located at a respective end of the channel, these reservoirs being made from a superconducting material and forming, with the channel, a Josephson junction, wherein: each reservoir comprises a lower face and a side face both buried inside the semiconductor layer, the lower face of each reservoir extends mainly in an intermediate plane parallel to the plane of the support, this intermediate plane being located between the lower plane and the upper plane of the semiconductor layer, and the side face of each reservoir extends mainly perpendicular to the plane of the support, this side face facing the corresponding side face of the other reservoir and being separated from this corresponding side face of the other reservoir by the channel.

2 . The transistor as claimed in claim 1 , wherein:
the gate comprises an upper face facing the side opposite the channel, this upper face being located flush with an interconnection plane or being located below this interconnection plane, this interconnection plane being parallel to the plane of the support, the superconducting material of the reservoir of an electrode of the transistor rises until being located flush with this interconnection plane, this electrode of the transistor being chosen from the group consisting of the source and the drain of the transistor.

3 . The transistor as claimed in claim 2 , wherein the transistor comprises an electrical contact outlet for electrically connecting this electrode to an electrical potential, this contact outlet being formed on the interconnection plane and in direct mechanical and electrical contact with the superconducting material that is located flush with the interconnection plane.

4 . The transistor as claimed in claim 2 , wherein the electrode of the transistor comprises:
side flanks that extend from the reservoir of this electrode to the interconnection plane, these side flanks being located in the extension of side faces of the reservoir and forming just a single block of superconducting material with this reservoir, and a body made of non-superconducting material, located on the reservoir and between these side flanks.

5 . The transistor as claimed in claim 3 , wherein the contact outlet comprises:
a body made of non-superconducting material, and an outer coating made of superconducting material that at least partially surrounds the body made of non-superconducting material, this coating extending from the superconducting material of the electrode that is located flush with the interconnection plane to an upper face of the contact outlet.

6 . The transistor as claimed in claim 1 , wherein the distance between the intermediate plane and the upper plane is between 0.25e 14 and 0.9e 14 , where e 14 is equal to the distance between the upper plane and the lower plane.

7 . The transistor as claimed in claim 6 , wherein the distance between the intermediate plane and the upper plane is between 0.5e 14 and 0.75e 14 .

8 . The transistor as claimed in claim 6 , wherein the distance e 14 is between 7 nm and 30 nm.

9 . The transistor as claimed in claim 1 , wherein the semiconductor layer is made from a semiconductor material or from an alloy of semiconductor materials chosen from the group consisting of silicon and germanium.

10 . A method for fabricating a Josephson transistor, this method comprising:
producing a stack comprising, in this order:
a support that extends mainly parallel to a plane called “plane of the support”,
a layer of electrically insulating material,
a semiconductor layer produced directly on the layer of electrically insulating material, this semiconductor layer having:
an upper face that extends in an upper plane parallel to the plane of the support, and
a lower face that extends in a lower plane parallel to the plane of the support, this lower face being located level with an interface between the semiconductor layer and the layer of electrically insulating material,
a gate located on the upper face of the semiconductor layer, the region of the semiconductor layer located under the gate being called “channel”,

producing a source and a drain each comprising an electric charge reservoir in electrical contact with the semiconductor layer of the stack, these reservoirs each being located at a respective end of the channel, these reservoirs being made from a superconducting material and forming, with the channel, a Josephson junction, wherein producing the source and the drain comprises: etching, into the semiconductor layer, at each end of the channel, a first and a second cavity, each of the first and second cavities having:
a bottom that extends mainly in an intermediate plane parallel to the plane of the support, this intermediate plane being located between the lower plane and the upper plane of the semiconductor layer, and
side walls that extend mainly perpendicular to the plane of the support and one of these side walls facing a corresponding side wall of the other cavity and being separated from this corresponding side wall of the other cavity by the channel,
depositing a superconducting material on the bottom and the side walls of the first and second cavities to obtain the reservoirs of the drain and of the source.

11 . The method as claimed in claim 10 , wherein:
when producing the stack, the semiconductor layer is made of silicon, when depositing the superconducting material, the deposited superconducting material is vanadium silicide, before the vanadium silicide is deposited, argon atoms are incorporated into the bottom and the side walls of the first and second cavities, and then a heat treatment is applied to increase the critical temperature of the deposited vanadium silicide.

12 . The method as claimed in claim 11 , wherein the incorporation of argon atoms generates, inside the silicon layer, a thin surface layer inside which the concentration of argon atoms is between 1 atom% and 10 atom%.

Assignees

• Commissariat Energie Atomique
• Univ Grenoble Alpes

Inventors

• Nemouchi Fabrice
• Gustavo Frederic
• Lefloch François
• Vethaak Tom

Classifications

• H10N60/805

  for Josephson-effect devices · CPC title

• H10N60/12

  Josephson-effect devices · CPC title

• H10N60/0912

  of Josephson-effect devices · CPC title

• H10N60/128 Primary

  having three or more electrodes, e.g. transistor-like structures · CPC title

• H01L39/2493

  Electricity · mapped topic