Impedance matching circuit and an impedance matching element

Patent metadata

Field	Value
Publication number	US-2022416751-A1
Application number	US-202117356530-A
Country	US
Kind code	A1
Filing date	Jun 24, 2021
Priority date	Jun 24, 2021
Publication date	Dec 29, 2022
Grant date	—

Abstract

Impedance matching circuits, impedance matching elements, and radio communication circuits are provided in this disclosure. The impedance matching circuit may include a first impedance matching element which is configured to radio communication circuit may include a modulator configured to receive an unbalanced input signal from a first input, and couple the unbalanced input signal to a first output to match an impedance of the first output to a first impedance. It may further include a second impedance matching element coupled to the first input to receive the unbalanced input signal, the second impedance matching element configured to couple the unbalanced input signal to a second output to match an impedance of the second output to a second impedance. A terminal of the first output and a terminal of the second output may be coupled to provide a balanced output signal, and the coupling may match an output impedance of the impedance matching circuit based on the first impedance and the second impedance.

First claim

What is claimed is:

1 . An impedance matching circuit comprising:
a first impedance matching element configured to:
receive an unbalanced input signal from a first input, and
couple the unbalanced input signal to a first output to match an impedance of the first output to a first impedance;
a second impedance matching element coupled to the first input to receive the unbalanced input signal, the second impedance matching element configured to couple the unbalanced input signal to a second output to match an impedance of the second output to a second impedance; wherein a terminal of the first output and a terminal of the second output are coupled to provide a balanced output signal, and wherein the coupling matches an output impedance of the impedance matching circuit based on the first impedance and the second impedance.

2 . The impedance matching circuit of claim 1 ,
wherein the first output comprises a first output terminal and a second output terminal, and the second output comprises a first output terminal and a second output terminal, and wherein the second output terminal of the first output is coupled to the first output terminal of the second output, and wherein the impedance matching circuit is configured to provide the balanced output signal from the first output terminal of the first output and the second output terminal of the second output.

3 . The impedance matching circuit of claim 2 ,
wherein the first impedance matching element further comprises a first input and the second impedance matching element further comprises a second input; and wherein the first input and the second input are coupled in a parallel configuration, and the first input is configured to match an impedance of the first input; and wherein the second input is configured to match an impedance of the second input.

4 . The impedance matching circuit of claim 3 ,
wherein the impedance of the first input substantially equals the first impedance, and the impedance of the second input substantially equals the impedance of the second impedance.

5 . The impedance matching circuit of claim 3 ,
wherein the first impedance substantially equals the second impedance, and the output impedance of the impedance matching circuit is four times the first impedance.

6 . The impedance matching circuit of claim 3 ,
wherein the first impedance matching element comprises a first balun comprising an unbalanced structure and a balanced structure, the first input being coupled to the unbalanced structure and the first output is coupled to the balanced structure; wherein the second impedance matching element comprises a second balun comprising an unbalanced structure and a balanced structure, wherein the second input is coupled to the unbalanced structure and the second output is coupled to the balanced structure.

7 . The impedance matching circuit of claim 6 ,
wherein the balanced structure of the first balun is configured to electro-magnetically couple the unbalanced structure of the first balun at a first predefined length of the balanced structure of the first balun; and wherein the balanced structure of the second balun is configured to electro-magnetically couple the unbalanced structure of the second balun at a second predefined length of the balanced structure of the second balun.

8 . The impedance matching circuit of claim 6 ,
wherein the unbalanced structure of the first balun comprises a first unbalanced component with a first predefined length and a second unbalanced component with a second predefined length; and wherein the balanced structure of the first balun comprises a first balanced component with the first predefined length and a second balanced component with the second predefined length; and wherein the first predefined length is different than the second predefined length.

9 . The impedance matching circuit of claim 8 ,
wherein the first predefined length of the balanced structure of the first balun is equal to the second predefined length of the balanced structure of the second balun.

10 . The impedance matching circuit of claim 6 ,
wherein the unbalanced structure of the second balun comprises a first unbalanced component with a first predefined length and a second unbalanced component with a second predefined length; and wherein the balanced structure of the second balun comprises a first balanced component with the first predefined length and a second balanced component with the second predefined length; and wherein the first predefined length is different than the second predefined length.

11 . The impedance matching circuit of claim 6 ,
wherein the first output terminal and the second output terminal of the first output comprise a differential output of the balanced structure of the first balun; and wherein the first output terminal and the second output terminal of the second output comprise a differential output of the balanced structure of the second balun.

12 . The impedance matching circuit of claim 6 ,
wherein the first unbalanced component of the unbalanced structure of the first balun is coupled to the first input, and the second unbalanced component of the unbalanced structure of the first balun is coupled to the ground; and wherein the first unbalanced component of the unbalanced structure of the second balun is coupled to the second input, and the second unbalanced component of the unbalanced structure of the second balun is coupled to the ground.

13 . The impedance matching circuit of claim 3 ,
wherein the first impedance matching element comprises a first transformer balun comprising a primary winding and a secondary winding; wherein the second impedance matching element comprises a second transformer balun comprising a primary winding and a secondary winding; wherein the first input comprises a first input terminal and a second input terminal; wherein the first input terminal and the second input terminal of the first input are coupled to the primary winding of the first transformer balun; wherein the second input comprises a first input terminal and a second input terminal; wherein the first input terminal and the second input terminal of the second input are coupled to the primary winding of the second transformer balun; wherein the secondary winding of the first transformer balun is coupled to the first output terminal and the second output terminal of the first output; and wherein the secondary winding of the second transformer balun is coupled to the first output terminal and the second output terminal of the second output.

14 . The impedance matching circuit of claim 13 , further comprising:
a third impedance matching element comprising a third transformer balun comprising a primary winding and a secondary winding; wherein the primary winding of the third transformer balun is coupled to the first input in a parallel configuration; and wherein the secondary winding of the third transformer is coupled to the first output and the second output in a series configuration.

15 . The impedance matching circuit of claim 13 , further comprising
an impedance matching circuit input coupled to a first signal path at which the primary winding of the first transformer balun, the primary winding of the second transformer balun, and the primary winding of the third transformer balun are coupled in parallel, an impedance matching circuit output comprising two terminals coupled at a second signal path at which the secondary winding of the first transformer balun, the secondary winding of the second transformer balun, and the secondary

Assignees

• Intel Corp

Inventors

• Bhat Ritesh A
• Shin Woorim

Classifications

• H03H7/42

  Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns · CPC title

• H03H7/38 Primary

  Impedance-matching networks · CPC title

• H01P5/10

  for coupling balanced lines or devices with unbalanced lines or devices · CPC title

• H03H7/09

  Filters comprising mutual inductance · CPC title