Semiconductor device

Patent metadata

Field	Value
Publication number	US-2022415884-A1
Application number	US-202217903113-A
Country	US
Kind code	A1
Filing date	Sep 6, 2022
Priority date	Mar 10, 2020
Publication date	Dec 29, 2022
Grant date	—

Abstract

A semiconductor device includes a semiconductor substrate, a contact region, a carrier suppression region and an electrode. The semiconductor substrate is shared by an insulated gate bipolar transistor (IGBT) region with an IGBT element and a freewheeling diode (FWD) region with an FWD element. The carrier suppression region is exposed from a surface of the semiconductor substrate in the IGBT region, and has a lower impurity concentration than the contact region. The carrier suppression region has a Schottky barrier junction with the electrode.

First claim

What is claimed is:

1 . A semiconductor device comprising:
a semiconductor substrate shared by an insulated gate bipolar transistor (IGBT) region with an IGBT element and a freewheeling diode (FWD) region with an FWD element, the semiconductor substrate including
a drift layer of a first conductivity type,
a base layer of a second conductivity type disposed on the drift layer,
a collector layer of the second conductivity type disposed at an opposite side of the drift layer from the base layer in the IGBT region, and
a cathode layer of the first conductivity type disposed at the opposite side of the drift layer from the base layer in the FWD region;
a plurality of trenches penetrating the base layer to reach the drift layer, each of the trenches having a lengthwise direction and extending in the lengthwise direction; a gate insulation film disposed at a wall surface of each of the trenches in the IGBT region; a gate electrode disposed on the gate insulation film; an emitter region of the first conductivity type as a surface layer portion of the base layer that is in contact with each of the trenches in the IGBT region, the emitter region having a higher impurity concentration than the drift layer; a contact region of the second conductivity type disposed at the surface layer portion of the base layer in the IGBT region, the contact region having a higher impurity concentration than the base layer; a first electrode disposed at a first surface of the semiconductor substrate at a side closer to the base layer, the first electrode electrically connected to the base layer and the emitter region; a second electrode disposed at a second surface of the semiconductor substrate at a side closer to the collector layer and the cathode layer, the second electrode electrically connected to the collector layer and the cathode layer; and a carrier suppression region of the second conductivity type exposed from the first surface of the substrate in the IGBT region, the carrier suppression region having a lower impurity concentration than the contact region, wherein the first electrode has a Schottky barrier junction with the carrier suppression region.

2 . The semiconductor device according to claim 1 ,
wherein the base layer is divided into a lower base layer and an upper base layer by a carrier storage layer in the IGBT region, wherein the lower base layer is at a side closer to the drift layer, and the upper base layer is at a side closer to the first surface of the semiconductor substrate, wherein the carrier storage layer has a higher impurity concentration than the drift layer, and wherein an impurity concentration of the lower base layer is different from an impurity concentration of the upper base layer.

3 . The semiconductor device according to claim 1 ,
wherein the emitter region and the contact region are alternately disposed along the lengthwise direction of each of the trenches in the IGBT region.

4 . The semiconductor device according to claim 3 ,
wherein the carrier suppression region is disposed inside the contact region, and is separated from the emitter region.

5 . The semiconductor device according to claim 4 ,
wherein a ratio of an area of the contact region to an area of the carrier suppression region is equal to or smaller than 1 to 2.

Assignees

• Denso Corp

Inventors

• Toriyama Shuichi
• Sumitomo Masakiyo
• RAHMAN Tasbir

Classifications

• H10D84/811 Primary

  Combinations of field-effect devices and one or more diodes, capacitors or resistors · CPC title

• H01L27/0664 Primary

  Electricity · mapped topic

• H01L29/7397

  Electricity · mapped topic

• H01L29/872

  Electricity · mapped topic

• H10D62/129

  Cathode regions of diodes · CPC title