Display panel, method for manufacturing display panel, and display device

US2022397784A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2022397784-A1
Application numberUS-202017612090-A
CountryUS
Kind codeA1
Filing dateDec 25, 2020
Priority dateDec 25, 2020
Publication dateDec 15, 2022
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure discloses a display panel, a method for manufacturing a display panel, and a display device, and belongs to the field of liquid crystal display technologies. The display panel includes an array substrate, a counter substrate, and a liquid crystal layer between the array substrate and the counter substrate. For the array substrate, a diffuse reflection layer is sequentially laminated on the array substrate. The array substrate includes a first base substrate, and a thin film transistor array, a diffuse reflection layer, and a first planarization layer that are laminated on the first base substrate. A surface of the diffuse reflection layer proximal to the first planarization layer is a reflection surface that has a plurality of protrusion structures, the protrusion structures are configured to diffusely reflect light irradiated on the reflection surface. Based on this structure, the first planarization layer may separate the protrusion structure from the liquid crystal layer to prevent the protrusion structure from affecting the driving effect of the liquid crystal layer. In this way, the problem in the related art regarding the poor display effect of the display panel is solved and thus the display effect of the display panel is improved.

First claim

Opening claim text (preview).

1 . A display panel, comprising: an array substrate, a counter substrate, and a liquid crystal layer between the array substrate and the counter substrate; wherein the array substrate comprises a first base substrate, and a thin film transistor array, a diffuse reflection layer, and a first planarization layer that are laminated on the first base substrate, wherein a surface, proximal to the first planarization layer, of the diffuse reflection layer is a reflection surface, the reflection surface being provided with a plurality of protrusion structures, the protrusion structures being configured to diffusely reflect light irradiated on the reflection surface. 2 . The display panel according to claim 1 , wherein the array substrate further comprises a plurality of support blocks between the diffuse reflection layer and the first base substrate, wherein the plurality of support blocks are disposed in orthographic projections of the plurality of protrusion structures on the first base substrate in one-to-one correspondence with the plurality of protrusion structures. 3 . The display panel according to claim 2 , wherein the thin film transistor array comprises a plurality of thin film transistors arranged in an array on the first base substrate, wherein the thin film transistor comprises a first electrode, a second electrode, and a third electrode configured to control connection or disconnection between the first electrode and the second electrode; and the support block and the first electrode in the thin film transistor are disposed in a same layer. 4 . The display panel according to claim 3 , wherein the array substrate further comprises a support plate on which the plurality of support blocks are disposed. 5 . The display panel according to claim 4 , wherein the support plate and the third electrode in the thin film transistor are disposed in a same layer. 6 . The display panel according to claim 1 , wherein the protrusion structure is a cambered protrusion structure, and a ratio of a diameter of the protrusion structure to a height of the protrusion structure in a direction perpendicular to the first base substrate satisfies 3:1 to 15:1. 7 . The display panel according to claim 6 , wherein the protrusion structure is formed by melting and cooling a columnar protrusion. 8 . The display panel according to claim 1 , wherein an orthographic projection of the protrusion structure on the first base substrate is square, and the orthographic projections of the plurality of protrusion structures on the first base substrate are arranged in rows and columns. 9 . The display panel according to claim 1 , wherein the display panel further comprises a first electrode layer on a side, proximal to the first planarization layer, of the liquid crystal layer, and a second electrode layer on a side, distal from the first planarization layer, of the liquid crystal layer; and the display panel further comprises a plurality of spacers comprising a first spacer, wherein an end of the first spacer abuts against the second electrode layer, and another end passes through the liquid crystal layer and abuts against the first electrode layer. 10 . The display panel according to claim 9 , wherein the thin film transistor array comprises a plurality of thin film transistors arranged in an array on the first base substrate, wherein the thin film transistor comprises a first electrode, a second electrode, and a third electrode configured to control connection or disconnection between the first electrode and the second electrode; and the first planarization layer is provided with a first through hole through which the first electrode layer is electrically connected to the first electrode, and an orthographic projection of the another end of the first spacer on the first planarization layer is disposed at the first through hole. 11 . The display panel according to claim 10 , wherein the diffuse reflection layer comprises a protrusion structure layer and a metal reflection layer covering the protrusion structure layer, wherein the protrusion structure layer is provided with a second through hole through which the metal reflection layer is electrically connected to the first electrode, and through which the first electrode layer is electrically connected to the metal reflection layer. 12 . The display panel according to claim 9 , wherein the counter substrate comprises a second base substrate, and a third planarization layer and the second electrode layer laminated on a side, proximal to the liquid crystal layer, of the second base substrate; and the counter substrate further comprises an adhesive structure, and the second electrode layer is provided with at least one opening in which the adhesive structure is disposed. 13 . The display panel according to claim 1 , wherein the liquid crystal layer comprises ferroelectric liquid crystal. 14 . The display panel according to claim 1 , wherein the thin film transistor array comprises a plurality of thin film transistors arranged in an array on the first base substrate; and the array substrate further comprises a second planarization layer between the plurality of thin film transistors and the diffuse reflection layer. 15 . The display panel according to claim 1 , wherein the protrusion structure is a spherical protrusion structure, and a ratio of a diameter to a radius of the protrusion structure satisfies 1.3:1 to 1.6:1; the display panel further comprises a plurality of support blocks between the diffuse reflection layer and the first base substrate, wherein the plurality of support blocks are disposed in orthographic projections of the plurality of protrusion structures on the first base substrate in one-to-one correspondence with the plurality of protrusion structures; the thin film transistor array comprises a plurality of thin film transistors arranged in an array on the first base substrate, wherein the thin film transistor comprises a first electrode, a second electrode, and a third electrode configured to control connection or disconnection between the first electrode and the second electrode, and the support block and the first electrode in the thin film transistor are disposed in a same layer; an orthographic projection of the protrusion structure on the first base substrate is square, and the orthographic projections of the plurality of protrusion structures on the first base substrate are arranged in rows and columns; the display panel further comprises a first electrode layer on a side, proximal to the first planarization layer, of the liquid crystal layer, and a second electrode layer on a side, distal from the first planarization layer, of the liquid crystal layer; the display panel further comprises a plurality of spacers comprising a first spacer, wherein an end of the first spacer abuts against the second electrode layer, and another end passes through the liquid crystal layer and abuts against the first electrode layer; and the first planarization layer is provided with a first through hole through which the first electrode layer is electrically connected to the first electrode, and an orthographic projection of the another end of the first spacer on the first planarization layer is disposed at the first through hole. 16 . A method for manufacturing a display panel, comprising: acquiring an array substrate; and forming a display panel comprising the array substrate, a liquid crystal layer, and a counter substrate; wherein the array substrate comprises a first base substrate, and a thin film transistor array, a diffuse reflection layer

Assignees

Inventors

Classifications

  • G02F1/1368Primary

    in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

  • using ferroelectric liquid crystals · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • having different architectures, e.g. having both top-gate and bottom-gate TFTs · CPC title

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What does patent US2022397784A1 cover?
The present disclosure discloses a display panel, a method for manufacturing a display panel, and a display device, and belongs to the field of liquid crystal display technologies. The display panel includes an array substrate, a counter substrate, and a liquid crystal layer between the array substrate and the counter substrate. For the array substrate, a diffuse reflection layer is sequentiall…
Who is the assignee on this patent?
Beijing Boe Display Tech Co, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/1368. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Dec 15 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).