Fault voltage scaling on load switch current sense

Patent metadata

Field	Value
Publication number	US-2022385282-A1
Application number	US-202117538547-A
Country	US
Kind code	A1
Filing date	Nov 30, 2021
Priority date	May 26, 2021
Publication date	Dec 1, 2022
Grant date	—

Abstract

A load switch includes a switch input, a switch output, a first field-effect transistor (FET), and a second FET. The switch input is adapted to be coupled to a controller output of a controller. The switch output is adapted to be coupled to a controller input of the controller. The first FET has a gate and a source. The gate of the first FET is coupled to the switch input. The second FET has a gate and a source. The gate of the second FET is coupled to the source of the first FET. The source of the second FET is coupled to the switch output.

First claim

What is claimed is:

1 . A load switch, comprising:
a switch input and a switch output, wherein the switch input is adapted to be coupled to a controller output of a controller, and the switch output is adapted to be coupled to a controller input of the controller; a first field-effect transistor (FET) having a gate and a source, wherein the gate of the first FET is coupled to the switch input; and a second FET having a gate and a source, wherein the gate of the second FET is coupled to the source of the first FET, and the source of the second FET is coupled to the switch output.

2 . The load switch of claim 1 , further comprising:
a charge pump that is coupled to the source of the first FET.

3 . The load switch of claim 1 , further comprising:
a current sense circuit that is coupled to a drain of the second FET.

4 . The load switch of claim 3 , further comprising:
a multiplexer that is coupled between the current sense circuit and the drain of the second FET.

5 . The load switch of claim 1 , further comprising:
a third FET having a source, wherein the source of the third FET is coupled to the source of the second FET and the switch output.

6 . The load switch of claim 1 , further comprising:
a p-channel FET having a gate that is adapted to be coupled to a device ground of the load switch.

7 . The load switch of claim 1 , further comprising:
a source-follower circuit that includes a p-type FET having a gate that is adapted to be coupled to the source of the first FET and to the gate of the second FET.

8 . The load switch of claim 1 , further comprising:
a current mirror having a drain that is coupled to the source of the first FET.

9 . A load switch, comprising:
a switch input and a switch output, wherein the switch input is adapted to be coupled to a controller output of a controller, and the switch output is adapted to be coupled to a controller input of the controller; and a clamp circuit configured to control a voltage level at the switch output based on a voltage level at the switch input, wherein the clamp circuit includes a first field-effect transistor (FET) coupled to the switch input and a second FET coupled to the switch output.

10 . The load switch of claim 9 , further comprising:
a current sense circuit configured to provide a sense current that is proportional to a load current, wherein the current sense circuit is coupled to a drain of the second FET.

11 . The load switch of claim 9 , wherein the clamp circuit is a first clamp circuit, and further comprising:
a second clamp circuit configured to control the voltage level at the switch output to a threshold voltage level responsive to the voltage level at the switch input transitioning below the threshold voltage level.

12 . The load switch of claim 11 , wherein the second clamp circuit includes a third FET having a gate, and the threshold voltage level is defined based on a voltage level at the gate of the third FET.

13 . The load switch of claim 9 , further comprising:
a ground loss circuit configured to disconnect the switch output from the second FET responsive to a ground loss event.

14 . The load switch of claim 9 , further comprising:
a source-follower circuit configured to, responsive to the voltage level at the switch output exceeding a threshold voltage level, divert, at least, a portion of sense current to ground.

15 . The load switch of claim 9 , further comprising:
a sense path variation circuit configured to reduce a deviation between a sense current and a current flowing through the first FET.

16 . A system comprising:
a controller having a controller input and a controller output; and a load switch having a switch input coupled to the controller output and a switch output coupled to the controller input, wherein the load switch includes a first field-effect transistor (FET) and a second FET, the first FET includes a gate coupled to the switch input and a source, and the second FET includes a gate coupled to the source of the first FET and a source coupled to the switch output.

17 . The system of claim 16 , further comprising a clamp circuit that includes the first and second FETs, wherein the clamp circuit is configured to control a voltage level at the switch output based on a voltage level at the switch input.

18 . The system of claim 16 , further comprising a clamp circuit that is configured to, responsive to the voltage level at the switch input transitioning below the threshold voltage level, control the voltage level at the switch output to a threshold voltage level.

19 . The system of claim 16 , wherein the load switch includes a ground loss circuit configured to, responsive to a ground loss event, disconnect the switch output from the second FET.

20 . The system of claim 16 , wherein the load switch includes a source-follower circuit with a p-type FET having a gate that is connected to the source of the first FET and the gate of the second FET.

Assignees

• Texas Instruments Inc

Inventors

• Phillips Cameron Wayne
• Qu Wenchao
• Yang Tianhong
• Rahman Md Abidur

Classifications

• H03K17/04123 Primary

  in field-effect transistor switches · CPC title

• H03K17/0822 Primary

  in field-effect transistor switches · CPC title

• H03K17/693

  Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors (logic circuits H03K19/00; code converters H03M5/00, H03M7/00) · CPC title