Current mode switching regulator and operating method with offset circuitry to emulate a transient load step response
US-2017237345-A1 · Aug 17, 2017 · US
US2022337162A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2022337162-A1 |
| Application number | US-202017636891-A |
| Country | US |
| Kind code | A1 |
| Filing date | Mar 24, 2020 |
| Priority date | Mar 24, 2020 |
| Publication date | Oct 20, 2022 |
| Grant date | — |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
The present disclosure describes various aspects of adaptive current control in switching power regulators for fast transient response. In some aspects, a clock of a switching power regulator is prevented, in response to detecting a transient load, from affecting application of current to an inductor of the regulator. A first switch device applies current to the inductor of the regulator until inductor current reaches a maximum current level. A second switch device then enables the current to flow through the inductor until the inductor current reaches a current control signal based on an output voltage of the switching power regulator. In some aspects, an offset is also applied to the current control signal to further increase average inductor current. These operations may be repeated without interruption from the clock to quickly increase the inductor current, and thus current provided to the regulator output in response to the transient load.
Opening claim text (preview).
1 . A method implemented by a switching power regulator to increase output current in response to an increase of a load on the switching power regulator, the method comprising: detecting the increase of the load at an output of the switching power regulator; initiating, in response to the increase of the load, an adaptive current control mode of the switching power regulator in which a clock of the switching power regulator is prevented from affecting application of current to an inductor of the switching power regulator; implementing a first phase of the adaptive current control mode in which the current is applied, via a first switch device and from an input of the switching power regulator, to the inductor of the switching power regulator until inductor current reaches a predefined level for maximum current; implementing a second phase of the adaptive current control mode in which the current is enabled to flow, via a second switch device and from a potential lower than the input of the switching power regulator, through the inductor until the inductor current reaches a current control signal that is based on an output voltage of the switching power regulator; detecting a reduction of the load at the output while the switching power regulator operates in the adaptive current control mode; and transitioning, in response to the reduction of the load at the output, the switching power regulator to operate in a steady state mode in which the clock of the switching power regulator affects the application of the current to the inductor of the switching power regulator. 2 . The method as recited by claim 1 , wherein operating the switching power regulator in the adaptive current control mode further comprises applying a predefined offset to the current control signal effective to increase an average amount of the inductor current that flows through the inductor. 3 . The method as recited by claim 1 , wherein operating the switching power regulator in the adaptive current control mode further comprises comparing a current-based derivative of the current control signal to a predefined ramp signal to detect the reduction of the load at the output. 4 . The method as recited by claim 1 , wherein operating the switching power regulator in the adaptive current control mode further comprises masking a slope compensation signal applied to the current control signal during operation in the steady state mode to prevent the slope compensation signal from affecting the application of current to the inductor. 5 . The method as recited by claim 1 , wherein: implementing the first phase of the adaptive current control mode includes: sensing, at a first node operably coupled to the first switch device, an amount of the current applied to the inductor of the switching power regulator to provide a first indication of the inductor current; and deactivating the first switch device in response to the first indication of inductor current flow meeting a predefined threshold for the level of maximum current; or implementing the second phase of the adaptive current control mode includes: sensing, at a second node operably coupled to the second switch device, an amount of the current flowing through the inductor of the switching power regulator to provide a second indication of the inductor current; and comparing, when the second switch device is activated, the second indication of the inductor current to the control signal that is based on the output voltage of the switching power regulator. 6 . The method as recited by claim 1 , further comprising detecting the increase of the load at the output of the switching power regulator based on at least one of: a transition of the switching power regulator from a pulse-frequency modulation (PFM) mode to a pulse-width modulation (PWM) mode; a dip in output voltage at the output of the switching power regulator; a rising edge of output voltage provided by an error amplifier operably coupled to the output of the switching power regulator to provide the current control signal; or a current-based output provided by the error amplifier operably coupled to the output of the switching power regulator. 7 . A circuit for regulating power comprising: a first switch device coupled to an input of the circuit; an inductor having a first terminal coupled to the first switch device and a second terminal coupled to an output of the circuit; a second switch coupled between the first terminal of the inductor and a potential lower than the input of the circuit; first and second sense circuitry configured to provide first and second indications of current flow through the first and second switch devices, respectively; a clock operably coupled to drive circuitry of the first switch device and the second switch device; a current comparator having an output operably coupled to the drive circuitry and a first input operably coupled to the second sense circuitry; an error amplifier having an input operably coupled to the output of the circuit and an output coupled to a second input of the current comparator; and an adaptive current controller configured to: detect an increase of a load at the output of the circuit; cause, in response to the increase of the load, the circuit to operate in an adaptive current control mode in which the clock of the circuit is prevented from affecting application of current to the inductor of the circuit; implement a first phase of the adaptive current control mode in which the current is applied, via the first switch device, to the inductor until the first indication of current flow through the inductor reaches a predefined level for maximum inductor current; implement a second phase of the adaptive current control mode in which the current is enabled to flow, via the second switch device, through the inductor until the current comparator determines that the second indication of current flow through the inductor reaches a current control signal provided via the output of the error amplifier; detect a reduction of the load at the output while the circuit operates in the adaptive current control mode; and transition, in response to the reduction of the load at the output, the circuit from the adaptive current control mode to operate in a steady state mode in which the clock of the circuit affects the application of the current to the inductor of the circuit. 8 . The circuit as recited by claim 7 , further comprising circuitry configured to apply an offset to the output signal of the error amplifier effective to increase an average amount of the current that flows in the inductor for at least a portion of time for which the circuit operates in the adaptive current control mode. 9 . The circuit as recited by claim 8 , wherein the circuitry further comprises: at least one logic gate configured to generate the offset in response to detecting the transient load at the output of the circuit; and a comparator configured to: compare a current-based indication of voltage at the output of the circuit with a predefined ramp signal for transitioning the circuit to the steady state mode or ceasing generation of the offset; and transition the circuit to the steady state mode in response to the current-based indication no longer exceeding the predefined ramp signal; or cease to generate the offset in response to the current-based indication no longer exceeding the predefined threshold. 10 . The circuit as recited by claim 9 , wherein the adaptive current controller is further configured to: set a magnitude of the offset applied to the current control signal based on a magnitude of the load at the output of the circuit; or set a magnitude or rate of increase of the
with digital control · CPC title
Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title
with a plurality of power processing stages connected in parallel · CPC title
Control circuits allowing low power mode operation, e.g. in standby mode · CPC title
Arrangements for modifying reference values, feedback values or error values in the control loop of a converter · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.