Driving backplane and display apparatus

US2022319396A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2022319396-A1
Application numberUS-202117512507-A
CountryUS
Kind codeA1
Filing dateOct 27, 2021
Priority dateMar 31, 2021
Publication dateOct 6, 2022
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed are a driving backplane and a display apparatus, including: a base substrate, a first conducting layer disposed on one side of the base substrate, a second conducting layer disposed on one side, facing away from the base substrate, of the first conducting layer, and a first insulating layer disposed between the first conducting layer and the second conducting layer, where the second conducting layer includes a plurality of pads, and each pad is connected with the first conducting layer through at least two first via holes.

First claim

Opening claim text (preview).

What is claimed is: 1 . A driving backplane, comprising: a base substrate; a first conducting layer disposed on one side of the base substrate; a second conducting layer disposed on one side, facing away from the base substrate, of the first conducting layer; and a first insulating layer disposed between the first conducting layer and the second conducting layer; wherein the second conducting layer comprises a plurality of pads; and each of the plurality of pads is connected with the first conducting layer through at least two first via holes. 2 . The driving backplane according to claim 1 , wherein pore diameters of the at least two first via holes are 2 μm-40 μm. 3 . The driving backplane according to claim 2 , wherein each pad corresponds to the at least two first via holes; and in a plurality of first via holes corresponding to a same pad, the pore diameters of at least two of the plurality of first via holes corresponding to the same pad are different. 4 . The driving backplane according to claim 2 , wherein each pad corresponds to the at least two first via holes; and the pore diameters of the at least two first via holes corresponding to the each pad are identical. 5 . The driving backplane according to claim 1 , wherein the first insulating layer between the first conducting layer and the second conducting layer comprises a plurality of sublayers; and part of the sublayers are organic sublayers, and part of the sublayers are inorganic sublayers. 6 . The driving backplane according to claim 5 , the inorganic sublayers are respectively attached to the first conducting layer and the second conducting layer; and at least one organic sublayer is disposed between the inorganic sublayers respectively attached to the first conducting layer and the second conducting layer. 7 . The driving backplane according to claim 1 , wherein a surface, facing away from the base substrate, of each pad has a concave-convex structure. 8 . The driving backplane according to claim 1 , wherein the first conducting layer has a plurality of opening regions and a plurality of conducting islands; each of the plurality of opening regions is internally provided with at least one of the plurality of conducting islands; a gap is formed between a periphery of each of the plurality of conducting islands and an edge of an corresponding opening region; and each pad is electrically connected with the at least one conducting island. 9 . The driving backplane according to claim 8 , wherein the gap between the periphery of each conducting island and the edge of the corresponding opening region is greater than or equal to a preset value; and the preset value comprises a sum of a process tolerance, an impurity maximum size and a reserved spacing. 10 . The driving backplane according to claim 8 , wherein one of the plurality of pads is connected with the plurality of conducting islands through the at least two first via holes; wherein the plurality of conducting islands corresponding to the one pad are mutually independent; or, at least one part of the plurality of conducting islands corresponding to the one pad are mutually connected. 11 . The driving backplane according to claim 8 , wherein a material of the conducting islands and a material of the first conducting layer are identical. 12 . The driving backplane according to claim 11 , wherein the materials of both the conducting islands and the first conducting layer are copper. 13 . The driving backplane according to claim 8 , further comprising: a second insulating layer disposed on one side, facing away from the base substrate, of the second conducting layer; wherein the second insulating layer has second via holes, and the second via holes expose the plurality of pads. 14 . The driving backplane according to claim 13 , wherein in each pad and a second via hole corresponding to the each pad, an orthographic projection of the concave-convex structure on the surface, facing away from the base substrate, of the each pad on the base substrate is disposed in an orthographic projection of the second via hole on the base substrate. 15 . The driving backplane according to claim 13 , further comprising: a component; wherein the component is connected with the plurality of pads through a welding layer disposed in the second via holes. 16 . The driving backplane according to claim 15 , the pads and pin terminals of the component connected with the pads are identical in quantity. 17 . A display apparatus, comprising the driving backplane according to claim 1 .

Assignees

Inventors

Classifications

  • Soldering or alloying · CPC title

  • of bump connectors · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • Cross-sectional shape, i.e. in side view · CPC title

  • changes in shapes · CPC title

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Frequently asked questions

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What does patent US2022319396A1 cover?
Disclosed are a driving backplane and a display apparatus, including: a base substrate, a first conducting layer disposed on one side of the base substrate, a second conducting layer disposed on one side, facing away from the base substrate, of the first conducting layer, and a first insulating layer disposed between the first conducting layer and the second conducting layer, where the second c…
Who is the assignee on this patent?
Hefei Xinsheng Optoelectronics Technology Co Ltd, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W72/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Oct 06 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).