Tracking device state transitions

Patent metadata

Field	Value
Publication number	US-2022300295-A1
Application number	US-201917635540-A
Country	US
Kind code	A1
Filing date	Oct 29, 2019
Priority date	Oct 29, 2019
Publication date	Sep 22, 2022
Grant date	—

Abstract

An example computing device includes a tracking device, an interface, a processor, and a controller. The interface including a power pin, a data pin, and a clock pin, where the interface is to couple the tracking device to the computing device via the power pin and the data pin, and the clock pin is disconnected from the tracking device. The controller is communicatively coupled to the processor and the interface, the controller is to control an operation of the tracking device via the data pin.

First claim

What is claimed is:

1 . A computing device comprising:
a tracking device; an interface including a power pin, a data pin, and a clock pin, wherein the interface is to couple the tracking device to the computing device via the power pin and the data pin, and the clock pin is disconnected from the tracking device; a processor; and a controller communicatively coupled to the processor and the interface, the controller to control an operation of the tracking device via the data pin.

2 . The computing device of claim 1 , further including an input device coupled to the controller, and the controller is to:
identify a button press that is input to the input device, and control the operation of the tracking device via the data pin and independent of an operating system of the computing device in response to the button press.

3 . The computing device of claim 1 , wherein the controller is to assert a signal via the data pin to control the operation, and the tracking device is to transition to a ready-to-activate state in response to the asserted signal.

4 . The computing device of claim 1 , wherein the tracking device is powered via the power pin, the power being provided to the tracking device while the computing device is in a back-up power state.

5 . The computing device of claim 1 , wherein the processor is to:
enable activation of the tracking device of the computing device in an operating system (OS) of the computing device; disable the activation of the tracking device in the OS; and enable deactivation of the tracking device in a pre-boot environment of the computing device.

6 . The computing device of claim 1 , wherein the processor is to:
provide a start-up menu during a pre-boot process of the computing device; and deactivate the tracking device in response to an input to the computing device provided during the pre-boot process.

7 . The computing device of claim 1 , wherein the tracking device is an M.2 communications module and the interface is an expansion slot.

8 . The computing device of claim 1 , wherein the processor and the controller are communicatively coupled to:
enable a first transition of the tracking device of the computing device from a first state to a second state in a first operating environment of the computing device; disable a second transition from the second state to the first state during execution of the first operating environment; and enable the second transition from the second state to the first state in a second operating environment of the computing device, wherein the first operating environment is executed prior to the execution of the second operating environment.

9 . A non-transitory computer-readable storage medium comprising instructions that when executed cause a processor of a computing device to:
enable activation of a tracking device of the computing device in an operating system (OS) of the computing device; disable deactivation of the tracking device in the OS; and enable the deactivation of the tracking device in a pre-boot environment of the computing device.

10 . The non-transitory computer-readable medium of claim 9 , the instructions further executable to:
initiate activation of the tracking device responsive to a button press and during execution of the OS; and deactivate the tracking device in the pre-boot environment.

11 . The non-transitory computer-readable medium of claim 9 , the instructions further executable to:
initiate activation of the tracking device responsive to a computer-readable instruction and during execution of the OS; and deactivate the tracking device, by the pre-boot environment.

12 . The non-transitory computer-readable medium of claim 9 , wherein the instructions when executed further cause the processor to enable the activation during the execution of the OS, and wherein the tracking device is activated independent of the OS by a controller of the computing device.

13 . A non-transitory computer-readable storage medium comprising instructions that when executed cause a processor of a computing device to:
enable a first transition of a tracking device of the computing device from a first state to a second state in a first operating environment of the computing device; disable a second transition from the second state to the first state during execution of the first operating environment; enable the second transition from the second state to the first state in a second operating environment of the computing device, wherein the first operating environment is executed prior to the execution of the second operating environment; and disable the second transition from the second state to the first state in the second operating environment.

14 . The non-transitory computer-readable medium of claim 13 , wherein the second state includes a deactivated state and the first state includes an activated state, and the first operating environment includes a pre-boot environment and the second operating environment includes an operating system of the computing device.

15 . The non-transitory computer-readable medium of claim 13 , wherein the first operating environment includes a pre-boot environment, and the pre-boot environment provides a signal to the tracking device to initiate the first transition to the second state during a boot-up operation of the computing device, the second state includes a deactivated state.

Assignees

• Hewlett Packard Development Co

Inventors

• Stancil Charles J
• Lagnado Isaac

Classifications

• G06F9/4418 Primary

  Suspend and resume; Hibernate and awake · CPC title

• G06F21/81

  by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations · CPC title

• G06F21/52 Primary

  during program execution, e.g. stack integrity {; Preventing unwanted data erasure; Buffer overflow} · CPC title

• G06F2221/2111

  Location-sensitive, e.g. geographical location, GPS · CPC title