Light-emitting diode driving apparatus and light-emitting diode driver

US2022254305A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2022254305-A1
Application numberUS-202217721337-A
CountryUS
Kind codeA1
Filing dateApr 14, 2022
Priority dateAug 13, 2019
Publication dateAug 11, 2022
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A LED driving apparatus with clock embedded cascaded LED drivers is introduced, including: a plurality of LED drivers, wherein the first stage LED driver receives an original data signal and outputs a first data signal, the Nth stage LED driver receives a (N−1)th data signal and outputs a Nth data signal. The Nth stage LED driver includes a clock data recovery circuit generating a recovery clock signal and a recovery data signal according to the (N−1)th data signal; and a first transmitter outputting the Nth data signal according to the recovery clock signal and the recovery data signal.

First claim

Opening claim text (preview).

What is claimed is: 1 . A Light-emitting diode (LED) driving apparatus, comprising: a plurality of LED drivers, wherein a first stage LED driver receives an original data signal and outputs a first data signal, a second stage LED driver receives the first data signal and outputs a second data signal, wherein the second stage LED driver comprises: a clock data recovery circuit, generating a recovery clock signal and a recovery data signal according to the first data signal; a data storage, sampling the recovery data signal at clock signal edges of the recovery clock signal to generate a sampled recovery data signal; and a first transmitter, outputting the second data signal according to the sampled recovery data signal. 2 . The LED driving apparatus as claimed in claim 1 , wherein the second stage LED driver comprises: an equalizer, receiving the first data signal and generating an equalized data signal to the clock data recovery circuit; and a first register, receiving the recovery data signal and the recovery clock signal to sample the recovery data signal at clock signal edges of the recovery clock signal to generate a first sampled recovery data signal according to the sampled values of the recovery data signal and the clock signal edges of the recovery clock signal, wherein the first transmitter receives the first sampled recovery data signal and outputting the second data signal according to the first sampled recovery data signal. 3 . The LED driving apparatus as claimed in claim 2 , wherein the second stage LED driver comprises: a second register, receiving an error signal and the recovery clock signal to sample the error signal at clock signal edges of the recovery clock signal to generate a sampled error signal according to the sampled values of the error signal and the clock signal edges of the recovery clock signal, wherein the error signal is from a second stage LED; and a second transmitter, receiving the sampled error signal and outputting an error readback signal to a controller according to the sampled error signal, wherein the error readback signal indicates a defect in the second stage LED. 4 . The LED driving apparatus as claimed in claim 1 , wherein the second stage LED driver comprises: an equalizer, receiving the first data signal and generating an equalized data signal to the clock data recovery circuit; a first in first out (FIFO) circuit, receiving the recovery data signal, the recovery clock signal and a FIFO readout clock signal to sample the recovery data signal at clock signal edges of the recovery clock signal to generate a second sampled recovery data signal according to the sampled values of the recovery data signal and clock signal edges of the FIFO readout clock signal; and a reference clock generator, generating the FIFO readout clock signal, wherein the first transmitter receives the second sampled recovery data signal and outputting the second data signal according to the second sampled recovery data signal. 5 . The LED driving apparatus as claimed in claim 4 , wherein the reference clock generator comprises: a crystal oscillator, generating an input clock signal; and a phase-locked loop circuit, receiving the input clock signal to generate the FIFO readout clock signal according to a second phase difference between the input clock signal and the FIFO readout clock signal, wherein the phase-locked loop circuit comprises a frequency divider. 6 . The LED driving apparatus as claimed in claim 4 , wherein the reference clock generator comprises: a crystal oscillator, generating an input clock signal; and a delay-locked loop circuit, receiving the input clock signal to generate the FIFO readout clock signal according to a third phase difference between the input clock signal and the FIFO readout clock signal. 7 . The LED driving apparatus as claimed in claim 1 , wherein the clock data recovery circuit comprises: a phase detector, receiving the first data signal and the recovery clock signal to generate a phase detecting signal according to a first phase difference between the first data signal and the recovery clock signal; a frequency detector, receiving the first data signal and the recovery clock signal to generate a frequency detecting signal according to a frequency difference between the first data signal and the recovery clock signal; a voltage-controlled oscillator, generating the recovery clock signal according to the phase detecting signal and the frequency detecting signal; and a decision circuit, receiving the first data signal and the recovery clock signal to generate the recovery data signal according to the first data signal and the recovery clock signal. 8 . The LED driving apparatus as claimed in claim 1 , wherein the clock data recovery circuit further generates a gray scale control clock signal to control a gray scale of the second stage LED according to the recovery clock signal. 9 . The LED driving apparatus as claimed in claim 1 , wherein the first data signal received by the second stage LED driver comprises a first display data signal and a first clock signal, and the first display data signal and the first clock signal are encoded with a first encoding format. 10 . The LED driving apparatus as claimed in claim 9 , wherein the second data signal outputted by the second stage LED driver comprises a second display data signal and a second clock signal, and the second display data signal and the second clock signal are encoded with the first encoding format.

Assignees

Inventors

Classifications

  • G09G3/32Primary

    semiconductive, e.g. using light-emitting diodes [LED] · CPC title

  • Passive matrix structure, i.e. with direct application of both column and row voltages to the light emitting or modulating elements, other than LCD or OLED · CPC title

  • Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters · CPC title

  • Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current · CPC title

  • Determination of a pixel data signal depending on the signal applied in the previous frame · CPC title

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What does patent US2022254305A1 cover?
A LED driving apparatus with clock embedded cascaded LED drivers is introduced, including: a plurality of LED drivers, wherein the first stage LED driver receives an original data signal and outputs a first data signal, the Nth stage LED driver receives a (N−1)th data signal and outputs a Nth data signal. The Nth stage LED driver includes a clock data recovery circuit generating a recovery cloc…
Who is the assignee on this patent?
Novatek Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification G09G3/32. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Aug 11 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).