Display panel and display device

US2022246093A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2022246093-A1
Application numberUS-202217727556-A
CountryUS
Kind codeA1
Filing dateApr 22, 2022
Priority dateOct 28, 2019
Publication dateAug 4, 2022
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Display panels and display devices are provided. The display panel includes a functional module area and a plurality of first signal wirings arranged along a first direction. The display panel includes a first area and a second area, and along the first direction, the functional module area is disposed between the first area and the second area. The plurality of first signal wirings include a plurality of first cross-lines and a plurality of first sub-signal wirings along a second direction, the plurality of first sub-signal wirings are disposed in a display area, the plurality of first cross-lines are connected to the plurality of first sub-signal wirings, and the second direction intersects the first direction. The first area includes M first cross-lines of the plurality of first cross-lines, the second area includes N first cross-lines of the plurality of first cross-lines, and M is greater than N.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display panel, comprising: a functional module area and a plurality of first signal wirings arranged along a first direction, wherein: the display panel further includes a first area and a second area, and along the first direction, the functional module area is disposed between the first area and the second area, the plurality of first signal wirings include a plurality of first cross-lines and a plurality of first sub-signal wirings along a second direction, the plurality of first sub-signal wirings are disposed in a display area, extension lines of the plurality of first sub-signal wirings cross the functional module area, the plurality of first cross-lines are connected to the plurality of first sub-signal wirings, and the second direction intersects the first direction, and the first area includes M first cross-lines of the plurality of first cross-lines, the second area includes N first cross-lines of the plurality of first cross-lines, M and N are integer numbers, and M is greater than N. 2 . The display panel according to claim 1 , wherein: the display panel includes at least two functional module areas, and the at least two functional module areas are aligned along the first direction and the first area is disposed between two adjacent functional module areas of the at least two functional module areas. 3 . The display panel according to claim 2 , further comprising a pixel unit, wherein: the first area has no overlap with the pixel unit, and/or the second area has no overlap with the pixel unit. 4 . The display panel according to claim 2 , further comprising a non-display area, wherein: the non-display area includes the first area, the second area, and the at least two functional module areas, and along the first direction, the second area is disposed between the functional module area and the display area. 5 . The display panel according to claim 4 , wherein: the plurality of first signal wirings further include a plurality of second sub-signal wirings and a first common cross-line, the plurality of second sub-signal wirings are disposed in the display area, the first common cross-line is disposed in the non-display area, signals on a preset number of second sub-signal wirings of the plurality of second sub-signal wirings are same, and each of two ends of the first common cross-line is connected to multiple second sub-signal wirings of the preset number of second sub-signal wirings with a same signal. 6 . The display panel according to claim 4 , wherein: the plurality of first signal wirings further include a plurality of second sub-signal wirings and a first common surrounding line, the plurality of second sub-signal wirings are disposed in the display area, the first common surrounding line is disposed in the non-display area, and surrounds the non-display area, signals on the plurality of second sub-signal wirings are same, and the first common surrounding line is connected to the plurality of second sub-signal wirings. 7 . The display panel according to claim 4 , further comprising a plurality of second signal wirings arranged along the second direction, wherein: the plurality of second signal wirings includes a plurality of third sub-signal wirings and a plurality of second cross-lines, the plurality of third sub-signal wirings are disposed in the display area, and the plurality of second cross-lines are disposed in the non-display area. 8 . The display panel according to claim 7 , wherein: the plurality of second signal wirings further include a plurality of fourth sub-signal wirings and a plurality of second common cross-lines, the plurality of fourth sub-signal wirings are disposed in the display area, the plurality of second common cross-lines are disposed in the non-display area, signals on a preset number of fourth sub-signal wirings of the plurality of fourth sub-signal wirings are same, and each of two ends of a second common cross-line of the plurality of second common cross-lines is connected to multiple fourth sub-signal wirings of the preset number of fourth sub-signal wirings. 9 . The display panel according to claim 7 , wherein: the plurality of second signal wirings further include a plurality of fourth sub-signal wirings and a second common surrounding line, the plurality of fourth sub-signal wirings are disposed in the display area, the second common surrounding line is disposed in the non-display area, and extends around the non-display area, signals on the plurality of fourth sub-signal wirings are same, and the second common surrounding line is connected to the plurality of fourth sub-signal wirings. 10 . The display panel according to claim 7 , wherein: along a thickness direction of the display panel, the plurality of first sub-signal wirings and the plurality of third sub-signal wirings overlap to each other in the first area; overlapping positions of the plurality of first sub-signal wirings and the plurality of third sub-signal wirings have capacitance compensation patterns, and the capacitance compensation patterns and the plurality of third sub-signal wirings form compensation capacitances. 11 . The display panel according to claim 7 , wherein: the plurality of first cross-lines and the plurality of first sub-signal wirings are disposed in different layers and a resistivity of the plurality of first cross-lines is greater than a resistivity of the plurality of first sub-signal wirings, and/or the plurality of second cross-lines and the plurality of third sub-signal wirings are disposed in different layers and a resistivity of the plurality of second cross-lines is greater than a resistivity of the plurality of third sub-signal wirings. 12 . The display panel according to claim 7 , wherein the first area includes a photosensitive element arrangement area, wherein: a light transmittance of the photosensitive element arrangement area is greater than a light-transmittance of the display area. 13 . The display panel according to claim 7 , wherein: the first area further includes a wiring area, the wiring area includes the plurality of first cross-lines in the first area, and the wiring area further includes the plurality of second cross-lines. 14 . The display panel according to claim 7 , wherein: signal wirings in the first area are arranged as a grid pattern. 15 . The display panel according to claim 1 , wherein: the first direction is a row direction of the display panel, and the plurality of first signal lines include one or more of scan signal lines, reference voltage lines, and light-emitting control lines, and/or the first direction is a column direction of the display panel, and the plurality of first signal lines include one or more of data signal lines, and positive power source voltage signal lines. 16 . The display panel according to claim 1 , wherein: the display panel includes at least two functional module area, and the at least two functional module areas are aligned along the second direction and an extension direction of the plurality of first cross-lines intersects the second direction. 17 . The display panel according to claim 16 , wherein: the plurality of first cross-lines further includes a first surrounding line section, a straight line section, and a second surrounding line section, and the straight line section extends along the first direction, an extension direction of the first surrounding line section intersects the first direction, and an extension direction of the se

Assignees

Inventors

Classifications

  • Layout of electrodes and connections · CPC title

  • G09G3/32Primary

    semiconductive, e.g. using light-emitting diodes [LED] · CPC title

  • G09G3/20Primary

    for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

  • Addressing of scan or signal lines · CPC title

  • G09F9/30Primary

    in which the desired character or characters are formed by combining individual elements (panels comprising a number of electrodes in a single cell controlling light arriving from an independent light source, e.g. electro-optical or magneto-optical cell, G02F1/00) · CPC title

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What does patent US2022246093A1 cover?
Display panels and display devices are provided. The display panel includes a functional module area and a plurality of first signal wirings arranged along a first direction. The display panel includes a first area and a second area, and along the first direction, the functional module area is disposed between the first area and the second area. The plurality of first signal wirings include a p…
Who is the assignee on this patent?
Wuhan Tianma Micro Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/32. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Aug 04 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).