Array substrate, display panel and display apparatus

US2022236601A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2022236601-A1
Application numberUS-202217584236-A
CountryUS
Kind codeA1
Filing dateJan 25, 2022
Priority dateJan 27, 2021
Publication dateJul 28, 2022
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An array substrate is provided. One of a first electrode layer and a second electrode layer in the array substrate includes at least one slit electrode. The slit electrode is disposed between two adjacent data leads in the array substrate, and includes an electrode connecting portion and a plurality of first strip-shaped sub-electrodes. The electrode connecting portion includes a first connecting section parallel to and adjacent to the data lead, and a distance between two adjacent first strip-shaped sub-electrodes in a direction parallel to an extending direction of the first connecting section gradually increases along a direction going away from the first connecting section.

First claim

Opening claim text (preview).

What is claimed is: 1 . An array substrate, comprising a base substrate, a first electrode layer, an insulating dielectric layer, and a second electrode layer which are laminated in sequence; wherein the array substrate further comprises a plurality of data leads; and one of the first electrode layer and the second electrode layer comprises at least one slit electrode; the slit electrode is disposed between two adjacent data leads, and the slit electrode comprises an electrode connecting portion and a plurality of first strip-shaped sub-electrodes arranged in sequence, one end of each of the first strip-shaped sub-electrodes being connected to the electrode connecting portion; the electrode connecting portion comprises a first connecting section parallel to and adjacent to the data lead, wherein the plurality of first strip-shaped sub-electrodes are disposed on a same side of the first connecting section; and a distance between two adjacent first strip-shaped sub-electrodes in a direction parallel to an extending direction of the first connecting section gradually increases along a direction going away from the first connecting section. 2 . The array substrate according to claim 1 , wherein the first connecting section comprises a first end and a second end that are opposite; in one slit electrode, the first strip-shaped sub-electrode extends from the first end towards a side close to the second end along the direction going away from the first connecting section; in two adjacent first strip-shaped sub-electrodes, an inclination angle of one of the first strip-shaped sub-electrodes close to the second end is smaller than an inclination angle of the other first strip-shaped sub-electrode close to the first end; wherein the inclination angle of each of the first strip-shaped sub-electrodes is an angle between an extending direction of the first strip-shaped sub-electrode and the extending direction of the first connecting section, and the inclination angle of each of the first strip-shaped sub-electrodes is an acute angle. 3 . The array substrate according to claim 2 , wherein in two adjacent first strip-shaped sub-electrodes, the inclination angle of one of the first strip-shaped sub-electrodes close to the second end is smaller than the inclination angle of the other first strip-shaped sub-electrode close to the first end by 1° to 3°. 4 . The array substrate according to claim 3 , wherein in two adjacent first strip-shaped sub-electrodes, the inclination angle of one of the first strip-shaped sub-electrodes close to the second end is smaller than the inclination angle of the other first strip-shaped sub-electrode close to the first end by 1.5° to 2.5°. 5 . The array substrate according to claim 2 , wherein when the slit electrode comprises 2M+1 first strip-shaped sub-electrodes arranged in sequence, the inclination angle of an (M+1) th first strip-shaped sub-electrode is 45°, M being a positive integer greater than or equal to 1. 6 . The array substrate according to claim 2 , wherein when the slit electrode comprises 2M first strip-shaped sub-electrodes arranged in sequence, either the inclination angle of an M th first strip-shaped sub-electrode or the inclination angle of an (M+1) th first strip-shaped sub-electrode is 45°, M being a positive integer greater than or equal to 1. 7 . The array substrate according to claim 2 , wherein when the slit electrode comprises 2M first strip-shaped sub-electrodes arranged in sequence, an average value of the inclination angle of an M th first strip-shaped sub-electrode and the inclination angle of an (M+1) th first strip-shaped sub-electrode is 45°, M being a positive integer greater than or equal to 1. 8 . The array substrate according to claim 2 , wherein the electrode connecting portion further comprises a second connecting section, and a first end of the second connecting section is connected to the first end of the first connecting section; wherein in one slit electrode, one ends of part of the plurality of first strip-shaped sub-electrodes are connected to the first connecting section, and one ends of the other first strip-shaped sub-electrodes are connected to the second connecting section. 9 . The array substrate according to claim 8 , wherein in one slit electrode, each of the first strip-shaped sub-electrodes has a first edge and a second edge which are opposite, and the first edge of the first strip-shaped sub-electrode is farther from a second end of the second connecting section than the second edge of the first strip-shaped sub-electrode is; and in one slit electrode, the first connecting section has a first edge and a second edge which are opposite to each other and are parallel to the extending direction of the first connecting section, and the second edge of the first connecting section is farther from the first strip-shaped sub-electrode than the first edge of the first connecting section is; wherein in one slit electrode, a distance between first design reference points of any two adjacent first strip-shaped sub-electrodes is equal; wherein the first design reference point of the first strip-shaped sub-electrode is an intersection point of a first auxiliary design line of the first strip-shaped sub-electrode and an auxiliary design line of the first connecting section, wherein the first auxiliary design line of the first strip-shaped sub-electrode is a straight line on which an orthographic projection of the first edge of the first strip-shaped sub-electrode on the base substrate is located, and the auxiliary design line of the first connecting section is a straight line on which an orthographic projection of the first edge of the first connecting section on the base substrate is located. 10 . The array substrate according to claim 8 , wherein in one slit electrode, each of the first strip-shaped sub-electrodes has a first edge and a second edge which are opposite, and the first edge of the first strip-shaped sub-electrode is farther from a second end of the second connecting section than the second edge of the first strip-shaped sub-electrode is; and in one slit electrode, the first connecting section has a first edge and a second edge which are opposite to each other and are parallel to the extending direction of the first connecting section, and the second edge of the first connecting section is farther from the first strip-shaped sub-electrode than the first edge of the first connecting section is; wherein in one slit electrode, in the plurality of first strip-shaped sub-electrodes connected to the first connecting section, a distance between first design reference points of any two adjacent first strip-shaped sub-electrodes is equal, and in the plurality of first strip-shaped sub-electrodes connected to the second connecting section, a distance between the first design reference points of two adjacent first strip-shaped sub-electrodes decreases sequentially along a direction going away from the first end of the first connecting section; wherein the first design reference point of the first strip-shaped sub-electrode is an intersection point of a first auxiliary design line of the first strip-shaped sub-electrode and an auxiliary design line of the first connecting section, the first auxiliary design line of the first strip-shaped sub-electrode is a straight line on which an orthographic projection of the first edge of the first strip-shaped sub-electrode on the base substrate is located, and the auxiliary design line of the first connecting section is a straight line on which an orthographic projection of the first edge of the first connecting section on the base substrate is located. 11 . The array substrate acc

Assignees

Inventors

Classifications

  • Wiring, e.g. gate line, drain line · CPC title

  • characterised by their geometrical arrangement · CPC title

  • G02F1/1362Primary

    Active matrix addressed cells {(G02F1/134336, G02F1/134363 take precedence)} · CPC title

  • Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes · CPC title

  • in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2022236601A1 cover?
An array substrate is provided. One of a first electrode layer and a second electrode layer in the array substrate includes at least one slit electrode. The slit electrode is disposed between two adjacent data leads in the array substrate, and includes an electrode connecting portion and a plurality of first strip-shaped sub-electrodes. The electrode connecting portion includes a first connecti…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/1362. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jul 28 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).