Partitioned template matching and symbolic peephole optimization

Patent metadata

Field	Value
Publication number	US-2022129411-A1
Application number	US-202017082844-A
Country	US
Kind code	A1
Filing date	Oct 28, 2020
Priority date	Oct 28, 2020
Publication date	Apr 28, 2022
Grant date	—

Abstract

Systems and techniques that facilitate partitioned template matching and/or symbolic peephole optimization are provided. In various embodiments, a system can comprise a template component, which can perform template matching on a Clifford circuit associated with a set of qubits. In various aspects, the system can comprise a partition component, which can partition, prior to the template matching, the Clifford circuit into a computation stage, a Pauli stage, and a SWAP stage. In various instances, the template matching can be performed on the computation stage. In various embodiments, the system can comprise a symbolic component, which can select a subset of qubits from the set of qubits, rewrite at least one entangling gate in the computation stage such that a target of the at least one entangling gate is in the subset of qubits, and replace the at least one rewired entangling gate with a symbolic Pauli gate. In various cases, the symbolic Pauli gate can be a Pauli gate that is controlled by a symbolic variable. In various aspects, the system can comprise a peephole component, which can perform peephole optimization on the subset of qubits with the symbolic Pauli gate by implementing a dynamic programming algorithm.

First claim

What is claimed is:

1 . A system, comprising:
a processor that executes computer-executable components stored in a computer-readable memory, the computer-executable components comprising:
a template component that performs template matching on a Clifford circuit associated with a set of qubits; and
a partition component that partitions, prior to the template matching, the Clifford circuit into a computation stage, a Pauli stage, and a SWAP stage, wherein the template matching is performed on the computation stage.

2 . The system of claim 1 , further comprising:
a floating component that pushes a blocking gate out of a template matching range in the computation stage by replacing the blocking gate with a linear combination of Pauli operators.

3 . The system of claim 1 , wherein the partition component re-partitions the Clifford circuit when performance of template matching in the computation stage yields a Pauli gate or a SWAP gate in the computation stage.

4 . The system of claim 1 , further comprising:
a symbolic component that selects a subset of qubits from the set of qubits, rewires at least one entangling gate in the computation stage such that a target of the at least one entangling gate is in the subset of qubits, and replaces the at least one rewired entangling gate with a symbolic Pauli gate, wherein the symbolic Pauli gate is a Pauli gate that is controlled by a symbolic variable.

5 . The system of claim 4 , further comprising:
a peephole component that performs peephole optimization on the subset of qubits with the symbolic Pauli gate by implementing a dynamic programming algorithm.

6 . A computer-implemented method, comprising:
performing, by a device operatively coupled to a processor, template matching on a Clifford circuit associated with a set of qubits; and partitioning, by the device and prior to the template matching, the Clifford circuit into a computation stage, a Pauli stage, and a SWAP stage, wherein the template matching is performed on the computation stage.

7 . The computer-implemented method of claim 6 , further comprising:
pushing, by the device, a blocking gate out of a template matching range in the computation stage by replacing the blocking gate with a linear combination of Pauli operators.

8 . The computer-implemented method of claim 6 , further comprising:
re-partitioning, by the device, the Clifford circuit when performance of template matching in the computation stage yields a Pauli gate or a SWAP gate in the computation stage.

9 . The computer-implemented method of claim 6 , further comprising:
selecting, by the device, a subset of qubits from the set of qubits; rewiring, by the device, at least one entangling gate in the computation stage such that a target of the at least one entangling gate is in the subset of qubits; and replacing, by the device, the at least one rewired entangling gate with a symbolic Pauli gate, wherein the symbolic Pauli gate is a Pauli gate that is controlled by a symbolic variable.

10 . The computer-implemented method of claim 9 , further comprising:
performing, by the device, peephole optimization on the subset of qubits with the symbolic Pauli gate by implementing a dynamic programming algorithm.

11 . A computer program product for facilitating partitioned template matching and symbolic peephole optimization, the computer program product comprising a computer readable memory having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to:
perform, by the processor, template matching on a Clifford circuit associated with a set of qubits; and partition, by the processor and prior to the template matching, the Clifford circuit into a computation stage, a Pauli stage, and a SWAP stage, wherein the template matching is performed on the computation stage.

12 . The computer program product of claim 11 , wherein the program instructions are further executable to cause the processor to:
push, by the processor, a blocking gate out of a template matching range in the computation stage by replacing the blocking gate with a linear combination of Pauli operators.

13 . The computer program product of claim 11 , wherein the program instructions are further executable to cause the processor to:
re-partition, by the processor, the Clifford circuit when performance of template matching in the computation stage yields a Pauli gate or a SWAP gate in the computation stage.

14 . The computer program product of claim 11 , wherein the program instructions are further executable to cause the processor to:
select, by the processor, a subset of qubits from the set of qubits; rewire, by the processor, at least one entangling gate in the computation stage such that a target of the at least one entangling gate is in the subset of qubits; and replace, by the processor, the at least one rewired entangling gate with a symbolic Pauli gate, wherein the symbolic Pauli gate is a Pauli gate that is controlled by a symbolic variable.

15 . The computer program product of claim 14 , wherein the program instructions are further executable to cause the processor to:
perform, by the processor, peephole optimization on the subset of qubits with the symbolic Pauli gate by implementing a dynamic programming algorithm.

16 . A system, comprising:
a processor that executes computer-executable components stored in a computer-readable memory, the computer-executable components comprising:
a peephole component that performs peephole optimization on a Clifford circuit associated with a set of qubits; and
a symbolic component that, prior to the peephole optimization, selects a subset of qubits from the set of qubits, rewires at least one entangling gate in the Clifford circuit such that a target of the at least one entangling gate is in the subset of qubits, and replaces the at least one rewired entangling gate with a symbolic Pauli gate.

17 . The system of claim 16 , wherein the symbolic Pauli gate is a Pauli-X gate that is controlled by a symbolic variable, wherein a value of the symbolic variable is 0 or 1.

18 . The system of claim 16 , further comprising:
a partition component that partitions the Clifford circuit into a computation stage, a Pauli stage, and a SWAP stage; and a template component that performs, prior to rewiring the at least one entangling gate, template matching on the computation stage.

19 . The system of claim 18 , further comprising:
a floating component that pushes a blocking gate out of a template matching range in the computation stage by replacing the blocking gate with a linear combination of Pauli operators.

20 . The system of claim 18 , wherein the partition component re-partitions the Clifford circuit when performance of template matching in the computation stage yields a Pauli gate or a SWAP gate in the computation stage.

21 . A computer-implemented method, comprising:
performing, by a device operatively coupled to a processor, peephole optimization on a Clifford circuit associated with a set of qubits; selecting, by the device, a subset of qubits from the set of qubits; rewiring, by the device, at least one entangling gate in the Clifford circuit such that a target of the at least one entangling gate is in the subset of qubits; and replacing, by the device and prior to the peephole optimization, the at least one rewired entangling gate with a symbolic Pauli gate.

22 . The compute

Assignees

• IBM

Inventors

• Bravyi Sergey
• Hu Shaohan
• Maslov Dmitri
• Shaydulin Ruslan

Classifications

• G06N5/01

  Dynamic search techniques; Heuristics; Dynamic trees; Branch-and-bound · CPC title

• G06F30/323

  Translation or migration, e.g. logic to logic, hardware description language [HDL] translation or netlist translation · CPC title

• G06N10/80

  Quantum programming, e.g. interfaces, languages or software-development kits for creating or handling programs capable of running on quantum computers; Platforms for simulating or accessing quantum computers, e.g. cloud-based quantum computing · CPC title

• G06N10/20 Primary

  Models of quantum computing, e.g. quantum circuits or universal quantum computers · CPC title

• G06N10/00

  Quantum computing, i.e. information processing based on quantum-mechanical phenomena · CPC title