Power control circuit for display device
US-2018158397-A1 · Jun 7, 2018 · US
US2022093052A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2022093052-A1 |
| Application number | US-202017422360-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 10, 2020 |
| Priority date | Jun 10, 2019 |
| Publication date | Mar 24, 2022 |
| Grant date | — |
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The present application refers to a control method and control device of a drive circuit, and a drive circuit. The control method of the drive circuit includes: acquiring a bus address in a bus signal. The bus signal is a signal transmitted over an I2C bus, and the I2C bus is connected to a timing controller. The control method further includes: if the timing controller determining that the bus address matches an address of the timing controller, transmitting a frequency adjustment signal to a controllable power supply with an adjustable operating frequency and connected to the timing controller. The frequency adjustment signal is configured to indicate that an operating frequency of the controllable power supply is adjusted from a first operating frequency to a second operating frequency. The second operating frequency is higher than the first operating frequency.
Opening claim text (preview).
1 . A control method of a drive circuit, comprising: acquiring a bus address in a bus signal, wherein the bus signal is a signal transmitted over an I2C bus, and the I2C bus is connected to a timing controller; and if the timing controller determining that the bus address matches an address of the timing controller, transmitting a frequency adjustment signal to a controllable power supply with an adjustable operating frequency and connected to the timing controller, wherein the frequency adjustment signal is configured to indicate that an operating frequency of the controllable power supply is adjusted from a first operating frequency to a second operating frequency, and wherein the second operating frequency is higher than the first operating frequency. 2 . The control method of the drive circuit according to claim 1 , wherein the transmitting a frequency adjustment signal to a controllable power supply with an adjustable operating frequency and connected to the timing controller comprises: transmitting the frequency adjustment signal to a frequency configuration bit of the controllable power supply, and adjusting the frequency configuration bit, so that the controllable power supply operates at the second operating frequency. 3 . The control method of the drive circuit according to claim 1 , wherein the first operating frequency is 600 KHz or lower, and the second operating frequency is 750 KHz or higher. 4 . The control method of the drive circuit according to claim 1 , wherein the first operating frequency is 600 KHz, and the second operating frequency is 1.2 MHz. 5 . The control method of the drive circuit according to claim 1 , wherein the timing controller comprises a plurality of function circuits, and the method further comprises: if the timing controller determining that the bus address matches the address of the timing controller, acquiring an address of a target function module circuit in the bus signal; generating and transmitting a query instruction to a memory according to the address of the target function circuit, and receiving switch control data corresponding to the target function circuit fed back by the memory; and controlling, according to the switch control data, a switch connected to the target function circuit to be turned on, so that the target function circuit acquires operation parameters of each function circuit stored in the memory through a corresponding switch; and wherein the target function ecircuit is a controlled function circuit indicated by the bus signal. 6 . The control method of the drive circuit according to claim 5 , wherein acquiring an address of the target function circuit in a bus signal comprises: continuing to receive the bus signal and parsing the subsequently received bus signal to convert the bus signal to an address identifiable inside the timing controller. 7 . The control method of the drive circuit according to claim 5 , wherein controlling, according to the switch control data, a switch connected to the target function circuit to be turned on comprises: if a plurality of the switch control data is received, controlling the switch connected to each of the target function circuits to be turned on sequentially according to each of the switch control data. 8 . The control method of the drive circuit according to claim 1 , wherein the timing controller determining that the bus address matches an address of the timing controller comprises: determining whether valid bit data other than a starting bit in data in the signal transmitted over the bus for addressing is consistent with data corresponding to the address of the timing controller. 9 . The control method of the drive circuit according to claim 5 , wherein the switch control data is stored in a look-up table in the memory, and the look-up table represents a corresponding relationship between an address of each function circuit and switch control data. 10 . The control method of the drive circuit according to claim 5 , wherein controlling, according to the switch control data, a switch connected to the target function circuit to be turned on comprises: generating a switch control analog signal according to the switch control data; transmitting the switch control analog signal to the switch connected to the corresponding target function circuit, and controlling the switch to be turned on. 11 . The control method of the drive circuit according to claim 10 , wherein the operation parameters of the function circuits comprise an operation parameter of an overdrive circuit, an operation parameter of a precision color control circuit and an operation parameter of a Dither circuit, and the switch control analog signal comprises: a first control signal, configured to control a first switch connected to the overdrive circuit to be turned on, so that the overdrive circuit acquires the operation parameter of the overdrive ecircuit from the memory; a second control signal, configured to control a second switch connected to the precision color control circuit to be turned on, so that the precision color control circuit acquires the operation parameter of the precision color control circuit from the memory through the second switch; and a third control signal, configured to control a third switch connected to the Dither circuit to be turned on, so that the Dither circuit acquires the operation parameter of the Dither circuit from the memory through the third switch; the function circuits comprise the overdrive circuit, the precision color control circuit and the Dither circuit, and the switches comprise the first switch, the second switch and the third switch. 12 . The control method of the drive circuit according to claim 1 , wherein the controllable power supply is a pulse width modulation chip power supply. 13 . A control device of a drive circuit, comprising a processor and a memory storing a computer program, and the processor implements the following processing when executing the computer program: acquiring a bus address in a bus signal transmitted over an I2C bus, wherein the I2C bus is connected to a timing controller; when the timing controller determining that the bus address matches an address of the timing controller, transmitting a frequency adjustment signal to a controllable power supply with an adjustable operating frequency and connected to the timing controller, wherein the frequency adjustment signal is configured to indicate that an operating frequency of the controllable power supply is adjusted from a first operating frequency to a second operating frequency, and wherein the second operating frequency is higher than the first operating frequency. 14 . A drive circuit, comprising: a controllable power supply, the controllable power supply being a power supply with an adjustable operating frequency; and a timing controller comprising a processor, a memory, a plurality of switches and a plurality of function circuits; wherein the memory stores switch control data for instructing to control an on or off state of each switch, an operation parameter of each function circuit, and a computer program; each function circuit is connected to the memory through a one-to-one corresponding switch; the processor is configured to be connected to an I2C bus, the processor is further connected to each of the switches, a first access terminal of the memory and the controllable power supply, the processor implements the following processing when executing the computer program: acquiring a bus address in a bus signal transmitted over an I2C bus, wherein the I2C bus is connected to a timing controller; if the ti
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