Measurement method using radio frequency power amplifier

Patent metadata

Field	Value
Publication number	US-2022069779-A1
Application number	US-202017006892-A
Country	US
Kind code	A1
Filing date	Aug 31, 2020
Priority date	Aug 31, 2020
Publication date	Mar 3, 2022
Grant date	—

Abstract

The measurement method includes operations of applying a first gate bias voltage to a gate terminal of a first transistor that is included in a radio frequency (RF) power amplifier during a direct current (DC) measurement period, wherein the first transistor operates in a linear operation mode during the DC measurement period; measuring a first drain-source voltage of the first transistor and a current flowing through the first transistor via a connection node during the DC measurement period; applying a second gate bias voltage and a drain bias voltage to a gate terminal and a drain terminal of a second transistor that is electrically connected to the first transistor via the connection node; and measuring a DC value of the second transistor via the connection node during the DC measurement period.

First claim

What is claimed is:

1 . A measurement method, comprising:
applying a first gate bias voltage to a gate terminal of a first transistor that is included in a radio frequency (RF) power amplifier during a direct current (DC) measurement period, wherein the first transistor operates in a linear operation mode during the DC measurement period; measuring a first drain-source voltage between a drain terminal and a source terminal of the first transistor and a current flowing through the first transistor via a connection node during the DC measurement period; applying a second gate bias voltage and a drain bias voltage to a gate terminal and a drain terminal of a second transistor, respectively, wherein the second transistor is included in the RF power amplifier and a source terminal of the second transistor is electrically connected to the drain terminal of the first transistor via the connection node; and measuring a DC value of the second transistor via the connection node during the DC measurement period.

2 . The measurement method of claim 1 , further comprising:
applying a third gate bias voltage to the gate terminal of the first transistor during a radio frequency (RF) stress period or a RF measurement period, wherein the first transistor operates in a saturation operation mode during the RF stress period or the RF measurement period.

3 . The measurement method of claim 1 , further comprising:
determining a resistance value of the first transistor based on the first drain-source voltage and the current flowing through the first transistor.

4 . The measurement method of claim 3 , wherein measuring the DC value of the second transistor comprises measuring a current-voltage (IV) characteristic curve of the second transistors, and the drain bias voltage that is applied to the drain terminal of the second transistor depends on the resistance value of the first transistor and the current flowing through the first transistor.

5 . The measurement method of claim 4 , wherein measuring the IV characteristic curve of the second transistor comprises:
sweeping at least one of the second gate bias voltage or the drain bias voltage in a voltage range having a plurality of step voltages; measuring step currents flowing corresponding to the plurality of step voltages via the connection node; and generating the IV characteristic curve based on the step currents and the plurality of step voltages.

6 . The measurement method of claim 3 , wherein measuring the DC value of the second transistor comprises measuring a saturation current of the second transistor, and measuring the saturation current of the second transistor comprises:
applying the second gate bias voltage and the drain bias voltage to the gate terminal of the second transistor and the drain terminal of the second transistor, wherein the second bias voltage is same as the drain bias voltage, and the drain bias voltage depends on the current flowing through the first transistor and the resistance value of the first transistor; sweeping the second bias voltage and the drain bias voltage in a voltage range having a plurality of step voltages; measuring step currents corresponding the plurality of step voltages via the connection node; and determining the saturation current according to the step currents that are measured via the connection node.

7 . The measurement method of claim 1 , wherein measuring the DC value of the second transistor comprises measuring a linear current of the second transistor, and measuring the linear current of the second transistor comprises:
setting the drain bias voltage to a predetermined voltage and applying the predetermined voltage to the drain terminal of the second transistor; sweeping the second gate bias voltage in a voltage range having a plurality of step voltages; and measuring step currents corresponding to the plurality of step voltages via the connection node; and determining the linear current according to the step currents that are measured via the connection node.

8 . The measurement method of claim 1 , wherein
the first transistor is one of a plurality of common-source transistors in a common-source stage of the RF power amplifier, the second transistor is one of a plurality of common-gate transistors in a common-gate stage of the RF power amplifier.

9 . A measurement method, comprising:
applying a first gate bias voltage to a gate terminal of a first transistor that is included in a radio frequency (RF) power amplifier during a direct current (DC) measurement period, wherein the first transistor operates in a linear operation mode during the DC measurement period; measuring a first drain-source voltage between a drain terminal and a source terminal of the first transistor and a current flowing through the first transistor via a connection node during the DC measurement period; determining a resistance value of the first transistor based on the first drain-source voltage and the current flowing through the first transistor; applying a second gate bias voltage and a drain bias voltage to a gate terminal and a drain terminal of a second transistor, respectively, wherein the second transistor is included in the RF power amplifier and a source terminal of the second transistor is electrically connected to the drain terminal of the first transistor via the connection node; measuring a DC value of the second transistor via the connection node during the DC measurement period; and applying a third gate bias voltage to the gate terminal of the first transistor during a RF stress period or a RF measurement period, wherein the first transistor operates in a saturation operation mode during the RF stress period or the RF measurement period.

10 . The measurement method of claim 9 , wherein measuring the DC value of the second transistor comprises measuring a current-voltage (IV) characteristic curve of the second transistor, and the drain bias voltage that is applied to the drain terminal of the second transistor depends on the resistance value of the first transistor and the current flowing through the first transistor.

11 . The measurement method of claim 9 , wherein measuring the IV characteristic curve of the second comprises:
sweeping at least one of the second gate bias voltage or the drain bias voltage in a voltage range having a plurality of step voltages; measuring step currents corresponding to the plurality of step voltages via the connection node; and generating the IV characteristic curve based on the step currents and the plurality of step voltages.

12 . The measurement method of claim 9 , wherein measuring the DC value of the second transistor comprises measuring a saturation current of the second transistor, and measuring the saturation current of the second transistor comprises:
applying the second bias voltage and the drain bias voltage to the gate terminal of the second transistor and the drain terminal of the second transistor, wherein the second bias voltage is same as the drain bias voltage, and the drain bias voltage depends on the current flowing through the first transistor and the resistance value of the first transistor; and sweeping the second bias voltage and the drain bias voltage in a voltage range having a plurality of step voltages; measuring step currents corresponding the plurality of step voltages via the connection node; and determining the saturation current according to the step currents that are measured via the connection node.

13 . The measurement method of claim 9 , wherein measuring the DC value of the second transistor comprises measuring a linear current of the second trans

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Yeh En-Hsiang
• Chen Wen-Sheng
• Liang Chia-Ming
• Chai Chung-Ho
• Li zong-you
• Yeh Tzu-Jin

Classifications

• G01R31/2621

  for testing field effect transistors, i.e. FET's · CPC title

• G01R31/3161

  Marginal testing · CPC title

• G01R31/2855

  Environmental, reliability or burn-in testing · CPC title

• H03F3/245

  with semiconductor devices only · CPC title

• H03F3/195 Primary

  in integrated circuits · CPC title