Display device and manufacturing method of display device

Patent metadata

Field	Value
Publication number	US-2022059632-A1
Application number	US-201817276423-A
Country	US
Kind code	A1
Filing date	Sep 18, 2018
Priority date	Sep 18, 2018
Publication date	Feb 24, 2022
Grant date	—

Abstract

A display device includes a gate electrode, a gate insulating film, a first metal oxide layer having crystallinity, and a second metal oxide layer having non-crystallinity. The first metal oxide layer and the second metal oxide layer are sequentially laminated on a substrate. The first metal oxide layer and the second metal oxide layer are in contact with each other in all regions where the first metal oxide layer and the second metal oxide layer overlap each other. The first metal oxide layer at least partially has a first semiconductor region serving as a semiconductor. One of the first metal oxide layer and the second metal oxide layer at least partially has a conductor region made electrically conductive.

First claim

1 . A display device comprising:
a transistor, wherein the transistor has a configuration including a gate electrode, a gate insulating film, a first metal oxide layer having crystallinity, and a second metal oxide layer having non-crystallinity, the first metal oxide layer and the second metal oxide layer are laminated on a substrate in this order, the first metal oxide layer and the second metal oxide layer are in contact with each other in all regions where the first metal oxide layer and the second metal oxide layer overlap each other, the first metal oxide layer at least partially has a first semiconductor region serving as a semiconductor, and one of the first metal oxide layer and the second metal oxide layer at least partially has a conductor region made electrically conductive.

2 . The display device according to claim 1 ,
wherein the first metal oxide layer is formed of a ternary oxide semiconductor containing at least tungsten or tin.

3 . The display device according to claim 1 ,
wherein the second metal oxide layer is formed of a ternary oxide semiconductor containing at least tungsten or tin.

4 . The display device according to claim 1 ,
wherein the first metal oxide layer and the second metal oxide layer are formed of an identical material.

5 . The display device according to claim 1 ,
wherein the second metal oxide layer at least partially has a second semiconductor region serving as a semiconductor.

6 . The display device according to claim 5 ,
wherein each of the first metal oxide layer and the second metal oxide layer has the conductor region, the second semiconductor region is divided into a source region side and a drain region side so as to be paired with the conductor region in the second metal oxide layer, and an edge between the conductor region and the second semiconductor region in the second metal oxide layer matches an edge between the conductor region and the first semiconductor region in the first metal oxide layer.

7 . The display device according to claim 5 ,
wherein the first metal oxide layer has the conductor region, the first semiconductor region is divided into a source region side and a drain region side so as to be paired with the conductor region in the first metal oxide layer, and at least a part of the second semiconductor region is sandwiched between the first semiconductor region on the source region side and the first semiconductor region on the drain region side.

8 . The display device according to claim 7 ,
wherein an edge between the conductor region and the first semiconductor region in the first metal oxide layer matches an edge of the second metal oxide layer.

9 . The display device according to claim 7 ,
wherein the second metal oxide layer has the conductor region, and an edge between the conductor region and the first semiconductor region in the first metal oxide layer matches an edge of the conductor region and the second semiconductor region in the second metal oxide layer.

10 . The display device according to claim 5 ,
wherein the first metal oxide layer is sandwiched between the substrate and the gate electrode, and the first semiconductor region has a shape matching the gate electrode.

11 . The display device according to claim 10 ,
wherein the second semiconductor region has a shape matching the gate electrode.

12 . The display device according to claim 5 ,
wherein the gate electrode is sandwiched between the substrate and the first metal oxide layer, and in a channel length direction in which a source region and a drain region face each other, a width of the gate electrode is larger than a width of the first semiconductor region or the second semiconductor region.

13 . The display device according to claim 5 , further comprising:
an interlayer insulating film and a terminal electrode laminated on the second metal oxide layer, wherein the terminal electrode is electrically connected to the conductor region through a contact hole formed in the interlayer insulating film.

14 . The display device according to claim 5 , further comprising:
a first transistor and a second transistor as a plurality of the transistors provided on the substrate, wherein in the first transistor, the second semiconductor region is divided into a source region side and a drain region side, and the first semiconductor region positioned between the divided second semiconductor regions serves as a channel region, and in the second transistor, the first semiconductor region is divided into a source region side and a drain region side, and the second semiconductor region positioned between the divided first semiconductor regions serves as a channel region.

15 . The display device according to claim 14 ,
wherein the first transistor serves as a write transistor, and the second transistor serves as a drive transistor.

16 . The display device according to claim 15 ,
wherein the second transistor serves as an initialization transistor configured to initialize a voltage of the drive transistor, and the second transistor serves as a threshold voltage compensation transistor configured to compensate for a threshold voltage of the drive transistor.

17 . A manufacturing method of a display device including a transistor formed on a substrate, the manufacturing method comprising:
forming a first metal oxide layer having non-crystallinity on the substrate; etching the first metal oxide layer; crystallizing the first metal oxide layer; forming a second metal oxide layer having non-crystallinity on the first metal oxide layer; etching the second metal oxide layer; forming a gate insulating layer and a gate electrode on the substrate; and making at least a part of one of the first metal oxide layer and the second metal oxide layer conductive.

18 . The manufacturing method of a display device according to claim 17 ,
wherein the first metal oxide layer and the second metal oxide layer are formed of an identical material, and an identical etchant is used when etching the first film and the second film.

Assignees

• Sharp Kk

Inventors

• ITO Kazuatsu

Classifications

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D30/031

  of thin-film transistors [TFT] · CPC title

• H10D99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H01L2227/323

  Electricity · mapped topic