Power Converter with Charge Injection from Booster Rail

Patent metadata

Field	Value
Publication number	US-2022029536-A1
Application number	US-202016936410-A
Country	US
Kind code	A1
Filing date	Jul 22, 2020
Priority date	Jul 22, 2020
Publication date	Jan 27, 2022
Grant date	—

Abstract

A converter circuit, included in a power converter circuit, may generate a given voltage level on a regulated power supply node of a computer system. A control circuit may monitor a voltage level and assert a control signal in response to a determination that a regulation event has occurred. A boost converter circuit, included in the power converter circuit, may inject charge into to the regulated power supply node via a capacitor, in response to an assertion of the control signal.

First claim

What is claimed is:

1 . An apparatus, comprising:
a first power converter circuit coupled to a regulated power supply node, wherein the first power converter circuit is configured to generate a given voltage level on the regulated power supply node; a second power converter circuit coupled to the regulated power supply node via a capacitor, wherein the second power converter circuit is configured to inject charge to the regulated power supply node in response to an assertion of a control signal; and a control circuit configured to assert the control signal in response to a detection of a regulation event associated with the regulated power supply node.

2 . The apparatus of claim 1 , wherein to assert the control signal in response to the detection of the regulation event, the control circuit is further configured to:
monitor a voltage level of the regulated power supply node; and assert the control signal in response to a determination that the voltage level of the regulated power supply node is less than a threshold value.

3 . The apparatus of claim 1 , wherein to assert the control signal in response to a detection of the regulation event, the control circuit is further configured to:
monitor a level of activity of at least one load circuit coupled to the regulated power supply node, and assert the control signal in response to a determination the level of activity is greater than a threshold value.

4 . The apparatus of claim 1 , wherein the control circuit is further configured to de-assert the control signal in response to a determination that the regulation event has ended.

5 . The apparatus of claim 4 , wherein the second power converter circuit is further configured to discharge a boost node coupled to the capacitor in response to a de-assertion of the control signal.

6 . The apparatus of claim 1 , wherein the first power converter circuit includes a plurality of phase circuits coupled to the regulated power supply node via respective ones of a plurality of inductors, and wherein the plurality of phase circuits are configured to source respective currents to the regulated power supply node via the respective ones of the plurality of inductors.

7 . A method, comprising:
generating, by a first converter circuit coupled to a regulated power supply node, a given voltage level on the regulated power supply node; monitoring, by a control circuit, the regulated power supply node; in response to determining a regulation event associated with the regulated power supply node has occurred, asserting a control signal by the control circuit; and injecting, by a second converter circuit coupled to the regulated power supply node via a capacitor, boost charge into the regulated power supply node.

8 . The method of claim 7 , wherein monitoring the regulated power supply node includes, comparing, by the control circuit, a voltage level of the regulated power supply node to a threshold value.

9 . The method of claim 8 , wherein asserting the control signal includes asserting the control signal in response to determining that the voltage level of the regulated power supply node is less than the threshold value.

10 . The method of claim 7 , further comprising:
monitoring, by the control circuit, a level of activity of at least one load circuit coupled to the regulated power supply node; and asserting the control signal in response to determining the level of activity is greater than an activity threshold value.

11 . The method of claim 7 , wherein the capacitor is further coupled to a boost node, and further comprising, discharging the boost node to a standby level, in response to determining the regulation event has ended.

12 . The method of claim 7 , wherein the first converter circuit includes a plurality of phase circuits, and wherein generating, by the first converter circuit, the given voltage level on the regulated power supply node includes sourcing, by the plurality of phase circuits, respective charge currents during respective charge time periods.

13 . The method of claim 12 , wherein generating, by the first converter circuit, the given voltage level on the regulated power supply node includes circulating, by the plurality of phase circuits, respective discharge currents from the regulated power supply node during respective discharge periods.

14 . An apparatus, comprising:
a first integrated circuit including a power converter circuit configured to generate a given voltage on a regulated power supply node; a second integrated circuit including:
a load circuit coupled to the regulated power supply node; and
a switch circuit coupled between the regulated power supply node and a boost node, wherein the switch circuit is configured to adjust an amount of capacitance between the regulated power supply node and the boost node; and
a third integrated circuit including a boost converter circuit configured to inject boost charge to the regulated power supply node, in response to an assertion of a control signal.

15 . The apparatus of claim 14 , wherein the switch circuit includes a plurality of capacitors coupled to the regulated power supply node and corresponding ones of a plurality of switches configured to coupled respective ones of the plurality of capacitors to the boost node using a plurality of switch control signals.

16 . The apparatus of claim 14 , wherein the load circuit is configured to generate an activation signal, and wherein the power converter circuit is further configured to generate the control signal using the activation signal.

17 . The apparatus of claim 14 , wherein the load circuit is configured to generate an activation signal, and wherein the third integrated circuit includes a control circuit configured to generate the control signal using the activation signal.

18 . The apparatus of claim 14 , wherein the power converter circuit is further configured to:
perform a comparison of a voltage level of the regulated power supply node to a threshold value; and generate the control signal using a result of the comparison.

19 . The apparatus of claim 14 , wherein the boost converter circuit is further configured to:
perform a comparison of a voltage level of the regulated power supply node to a threshold value; and generate the control signal using a result of the comparison.

20 . The apparatus of claim 14 , wherein to inject the boost charge, the boost converter circuit is further configured to charge the boost node to a voltage level greater than a voltage level of the regulated power supply node.

Assignees

• Apple Inc

Inventors

• Zyuban Victor
• Rohrer Norman J
• Searles Shawn

Classifications

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• H03K5/24 Primary

  the characteristic being amplitude · CPC title