Error reduction and, or, correction in analog computing including quantum processor-based computing

Patent metadata

Field	Value
Publication number	US-2022019929-A1
Application number	US-202117387654-A
Country	US
Kind code	A1
Filing date	Jul 28, 2021
Priority date	Feb 28, 2018
Publication date	Jan 20, 2022
Grant date	—

Abstract

The systems, devices, articles, and methods described herein generally relate to analog computers, for example quantum processors comprising qubits, couplers, and, or cavities. Analog computers, for example quantum processor based computers, are the subject of various sources of error which can hinder operation, potentially reducing computational accuracy and speed. Sources of error can be broadly characterized, for example as i) a background susceptibility do to inherently characteristics of the circuitry design, ii) as an h/J ratio imbalance, iii) bit flip errors, iv) fidelity, and v) Anderson localization, and various combinations of the aforesaid.

First claim

1 .- 50 . (canceled)

51 . A method of operation in a computational system that comprises both a quantum processor and at least one processor-based device communicatively coupled to one another, the quantum processor comprising a plurality of qubits and a plurality of coupling devices, wherein each coupling device is operable to provide controllable communicative coupling between two of the plurality of qubits, the method comprising:
producing a problem graph representation of a first problem; identifying each of the qubits that will be operated as a problem qubit, the problem qubit to be used when generating solutions to a first problem; for each of at least a number of the qubits that will be operated as problem qubits, identifying a respective ancilla qubit to apply an external flux bias to the respective problem qubits; embedding the problem graph representation of the first problem into the problem qubits of the quantum processor; applying an external flux bias to each problem qubit to at least partially reduce an h/J ratio misbalance of the respective qubit; and evolving the quantum processor with the problem graph representation embedded therein to generate solutions to the first problem via the quantum processor.

52 . The method of claim 51 , further comprising:
identifying a problem type of a first problem; determining whether the identified problem type of the first problem is a problem type that is relatively sensitive to h/J misbalance error or is a problem type that is relatively insensitive to h/J misbalance error; and wherein the identifying each of the qubits that will be operated as a problem qubit to be used when generating solutions to a first problem and the identifying a respective ancilla qubit to apply an external flux bias to the respective problem qubits is responsive to a determination that the problem type of the first problem is one that is relatively sensitive to h/J misbalance, employing existing hardware of the quantum processor to compensate for h/J misbalance when evolving the quantum processor to generate solutions to the first problem via the quantum processor.

53 . The method of claim 52 , the method comprising:
in response to a determination that the problem type is one that is relatively insensitive to h/J misbalance error, employing the existing hardware to embed a problem graph of the first problem in a hardware graph of the quantum processor without using the existing hardware of the quantum processor to compensate for h/J misbalance error.

54 . The method of claim 53 wherein employing the existing hardware to embed a problem graph of the first problem in a hardware graph of the quantum processor without using the existing hardware of the quantum processor to compensate for h/J misbalance error includes embedding the problem graph of the first problem in the hardware graph of the quantum processor without any ancilla qubits to compensate for h/J misbalance error.

55 . The method of claim 52 wherein determining whether the identified problem type of the first problem is a problem type that is relatively sensitive to h/J misbalance error or is a problem type that is relatively insensitive to h/J misbalance error includes determining whether the first problem is an optimization problem and hence is relatively sensitive to h/J misbalance error.

56 . (canceled)

57 . The method of claim 52 wherein determining whether the identified problem type of the first problem is a problem type that is relatively sensitive to h/J misbalance error or is a problem type that is relatively insensitive to h/J misbalance error includes querying at least one of a data schema or a piece of metadata, logically associated with the first problem via one or more stored relationships.

58 . The method of claim 52 wherein determining whether the identified problem type of the first problem is a problem type that is relatively sensitive to h/J misbalance error χ or is a problem type that is relatively insensitive to h/J misbalance error includes analyzing the first problem to determine a broad class of problems to which the first problem belongs.

59 . The method of claim 52 , the method further comprising:
identifying a problem type of a second problem; determining whether the identified problem type of the second problem is a problem type that is relatively sensitive to h/J misbalance error or is a problem type that is relatively insensitive to h/J misbalance error; and in response to a determination that the problem type of the second problem is a problem type that is relatively insensitive to h/J misbalance error, employing the existing hardware of the quantum processor to embed the a problem graph of the second problem without using the existing hardware to compensate for h/J misbalance error when evolving the quantum processor to generate solutions to the second problem via the quantum processor.

60 . The method of claim 59 wherein employing the existing hardware of the quantum processor to embed the problem graph of the second problem without using the existing hardware to compensate for h/J misbalance error when evolving the quantum processor to generate solutions to the second problem via the quantum processor includes embedding the problem graph of the second problem in the hardware graph of the quantum processor without any ancilla qubits to compensate for h/J misbalance error.

61 . The method of claim 59 wherein employing the existing hardware of the quantum processor to embed the a problem graph of the second problem without using the existing hardware to compensate for h/J misbalance error when evolving the quantum processor to generate solutions to the second problem via the quantum processor includes embedding the problem graph of the second problem in the hardware graph of the quantum processor employing one or more of the qubits of the quantum processor that were used as ancilla qubits when evolving the quantum processor to generate solutions for the first problem as problem qubits when generating solutions for the second problem.

62 . A computational annealing system, comprising:
a quantum processor, the quantum processor comprising a plurality of qubits and a plurality of coupling devices, wherein each coupling device is operable to provide controllable communicative coupling between two of the plurality of qubits; and at least one processor-based device communicatively coupled to the quantum processor; at least one non-transitory processor-readable medium that stores at least one of processor-executable instructions or data which, when executed, cause at least one processor to: produce a problem graph representation of a first problem; identify each of the qubits that will be operated as a problem qubit, the problem qubit to be used when generating solutions to a first problem; for each of at least a number of the qubits that will be operated as problem qubits, identify a respective ancilla qubit to apply an external flux bias to the respective problem qubits; embed the problem graph representation of the first problem into the problem qubits of the quantum processor; and evolve the quantum processor with the problem graph representation embedded therein to generate solutions to the first problem via the quantum processor.

63 . The computational annealing system of claim 62 wherein the at least one of processor-executable instructions or data, when executed, further cause the at least one processor to:
identify a problem type of a first problem; and
determine whether the identified problem type of the first problem is a problem type that is relatively sensitive to h/J misbalan

Assignees

• D Wave Systems Inc

Inventors

• Bunyk Paul I
• King James
• Thom Murray C
• Amin Mohammad H
• Smirnov Anatoly
• Yarkoni Sheir
• Lanting Trevor M
• King Andrew D
• Boothby Kelly T R

Classifications

• G06N5/01

  Dynamic search techniques; Heuristics; Dynamic trees; Branch-and-bound · CPC title

• G06N10/70 Primary

  Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation · CPC title

• G06F11/0793

  Remedial or corrective actions (recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40) · CPC title

• G06F11/0751

  Error or fault detection not based on redundancy (power supply failures G06F1/30; network fault management H04L41/06) · CPC title

• G06F11/0736

  in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function (testing or monitoring of automated control systems G05B23/02) · CPC title