Data processing apparatus and related products

Patent metadata

Field	Value
Publication number	US-2022019439-A1
Application number	US-202117489671-A
Country	US
Kind code	A1
Filing date	Sep 29, 2021
Priority date	Apr 4, 2019
Publication date	Jan 20, 2022
Grant date	—

Abstract

The present disclosure provides a data processing apparatus and related products. The products include a control module including an instruction caching unit, an instruction processing unit, and a storage queue unit. The instruction caching unit is configured to store computation instructions associated with an artificial neural network operation; the instruction processing unit is configured to parse the computation instructions to obtain a plurality of operation instructions; and the storage queue unit is configured to store an instruction queue, where the instruction queue includes a plurality of operation instructions or computation instructions to be executed in the sequence of the queue. By adopting the above-mentioned method, the present disclosure can improve the operation efficiency of related products when performing operations of a neural network model.

First claim

1 . A data processing apparatus, comprising a control circuit and an execution circuit, wherein the control circuit includes a tensor control module, and the control circuit is configured to:
when an operand of a decoded first processing instruction includes an identifier of a descriptor, determine a descriptor storage space corresponding to the descriptor by the tensor control module according to the identifier of the descriptor, wherein the descriptor indicates a shape of a tensor data; obtain content of the descriptor from the descriptor storage space; and send the content of the descriptor and the first processing instruction to the execution circuit, for the execution circuit to execute the first processing instruction according to the content of the descriptor.

2 . The data processing apparatus of claim 1 , wherein the execution circuit is configured to:
determine a data address of the tensor data corresponding to the operand of the first processing instruction in a data storage space according to the received content of the descriptor and the first processing instruction; and execute the first processing instruction according to the data address.

3 . The data processing apparatus of claim 2 , wherein the control circuit is configured to:
when the first processing instruction is a descriptor registration instruction, obtain a registration parameter of the descriptor in the first processing instruction, wherein the registration parameter includes at least one of the identifier of the descriptor, the shape of the tensor data, and content of the tensor data indicated by the descriptor; determine, by the tensor control module, a first storage area in the descriptor storage space for storing the content of the descriptor, and a second storage area in the data storage space for storing the content of the tensor data indicated by the descriptor; determine the content of the descriptor according to the registration parameter of the descriptor and the second storage area, thus establishing a correspondence between the descriptor and the second storage area; and store the content of the descriptor into the first storage area.

4 . The data processing apparatus of claim 1 , wherein the control circuit is configured to:
when the first processing instruction is a descriptor release instruction, obtain an identifier of the descriptor in the first processing instruction; and release, by the tensor control module, a first storage area storing the content of descriptor in the descriptor storage space and a second storage area storing the tensor data in the data storage space, according to the identifier of the descriptor.

5 . The data processing apparatus of claim 1 , wherein the control circuit is configured to:
when the first processing instruction is a descriptor modification instruction, obtain a modification parameter of the descriptor in the first processing instruction, wherein the modification parameter includes at least one of the identifier of the descriptor, a tensor shape to be modified, and the content of the tensor data referenced by the descriptor; determine content to be updated of the descriptor by the tensor control module according to the modified parameter of the descriptor; and update the content of the descriptor in the descriptor storage space by the tensor control module according to the content to be updated.

6 . The data processing apparatus of claim 1 , wherein the control circuit further includes a dependency determining module, wherein the control circuit is further configured to:
determine, by the dependency determining module, whether there is a second processing instruction that has a dependency relationship with the first processing instruction according to the identifier of the descriptor, wherein the second processing instruction includes a processing instruction prior to the first processing instruction in an instruction queue and has the same identifier of the descriptor in its operand; and block or cache the first processing instruction when there is the second processing instruction that has a dependency relationship with the first processing instruction.

7 . The data processing apparatus of claim 1 , wherein the control circuit is configured to:
determine a current state of the descriptor according to the identifier of the descriptor by the tensor control module, wherein the current state of the descriptor includes an operable state or an inoperable state; and block or cache the first processing instruction when the descriptor is in the inoperable state.

8 . An artificial intelligence chip, comprising the data processing apparatus of claim 1 .

9 . The artificial intelligence chip of claim 8 , wherein the execution circuit is configured to:
determine a data address of the tensor data corresponding to the operand of the first processing instruction in a data storage space according to the received content of the descriptor and the first processing instruction; and execute the first processing instruction according to the data address.

10 . The artificial intelligence chip of claim 9 , wherein the control circuit is configured to:
when the first processing instruction is a descriptor registration instruction, obtain a registration parameter of the descriptor in the first processing instruction, wherein the registration parameter includes at least one of the identifier of the descriptor, the shape of the tensor data, and content of the tensor data indicated by the descriptor; determine, by the tensor control module, a first storage area in the descriptor storage space for storing the content of the descriptor, and a second storage area in the data storage space for storing the content of the tensor data indicated by the descriptor; determine the content of the descriptor according to the registration parameter of the descriptor and the second storage area, thus establishing a correspondence between the descriptor and the second storage area; and store the content of the descriptor into the first storage area.

11 . The artificial intelligence chip of claim 8 , wherein the control circuit is configured to:
when the first processing instruction is a descriptor release instruction, obtain an identifier of the descriptor in the first processing instruction; and release, by the tensor control module, a first storage area storing the content of descriptor in the descriptor storage space and a second storage area storing the tensor data in the data storage space, according to the identifier of the descriptor.

12 . The artificial intelligence chip of claim 8 , wherein the control circuit is configured to:
when the first processing instruction is a descriptor modification instruction, obtain a modification parameter of the descriptor in the first processing instruction, wherein the modification parameter includes at least one of the identifier of the descriptor, a tensor shape to be modified, and the content of the tensor data referenced by the descriptor; determine content to be updated of the descriptor by the tensor control module according to the modified parameter of the descriptor; and update the content of the descriptor in the descriptor storage space by the tensor control module according to the content to be updated.

13 . The artificial intelligence chip of claim 8 , wherein the control circuit further includes a dependency determining module, wherein the control circuit is further configured to:
determine, by the dependency determining module, whether there is a second processing instruction that has a dependency relationship with the first processing instruction according to the iden

Assignees

• Cambricon Tech Corp Ltd

Inventors

• Liu Shaoli
• Wang Bingrui
• Zhou Xiaoyong
• Zhuang Yimin
• Lan Huiying
• Liang Jun
• Zeng Hongbo

Classifications

• G06F9/30043

  LOAD or STORE instructions; Clear instruction · CPC title

• G06F9/3824

  Operand accessing · CPC title

• G06N3/08

  Learning methods · CPC title

• G06F9/30181 Primary

  Instruction operation extension or modification · CPC title

• G06F9/30036 Primary

  Instructions to perform operations on packed data, e.g. vector, tile or matrix operations · CPC title