Programmable Millimeter Wave Radar Integrated Circuit

Patent metadata

Field	Value
Publication number	US-2022018930-A1
Application number	US-202117487851-A
Country	US
Kind code	A1
Filing date	Sep 28, 2021
Priority date	Mar 29, 2019
Publication date	Jan 20, 2022
Grant date	—

Abstract

A radar receiver stage on an integrated circuit and a method of processing a received radar signal, are provided. In one aspect, the receiver stage includes a low noise amplifier adapted to be connected to a receiver antenna structure, a first programmable gain amplifier, a first programmable bandpass filter, a second programmable gain amplifier, a second programmable bandpass filter, and a programmable low pass filter. One example method includes selecting a radar system configuration including a system type comprising an FMCW system or a Doppler system, programming at least a first programmable gain amplifier stage to a first gain, programming a first programmable bandpass filter stage to a first center frequency; and programming a programmable low pass filter to a first LPF gain.

First claim

What is claimed is:

1 . An integrated circuit configured for processing millimeter wave radar signals, comprising:
a low noise amplifier adapted to be connected to a receiver antenna structure; a first programmable gain amplifier programmable to a first gain; a first programmable bandpass filter programmable to a first center frequency; a second programmable gain amplifier programmable to a second gain; a second programmable bandpass filter programmable to a second center frequency and a programmable low pass filter programmable to a first low pass filter (LPF) gain.

2 . The integrated circuit of claim 1 , further including a mixer having an input connected to an output of the low noise amplifier and an output connected to an input of the first programmable gain amplifier.

3 . The integrated circuit of claim 1 , wherein the second programmable gain amplifier has an input connected to an output of the first programmable bandpass filter and an output connected to the second programmable bandpass filter.

4 . The integrated circuit of claim 1 , wherein the second programmable bandpass filter has an output connected to an input of the programmable low pass filter.

5 . The integrated circuit of claim 1 , further including an analog to digital converter having an input connected to an output of the programmable low pass filter.

6 . The integrated circuit of claim 1 , wherein each programmable gain amplifier comprises an amplifier stage including at least two amplifier elements and at least two bypass elements.

7 . The integrated circuit of claim 1 , wherein each bandpass filter comprises a bandpass filter stage including at least two bandpass filter elements and at least two bypass elements.

8 . The integrated circuit of claim 2 , wherein the output of the mixer comprises an in-phase signal and a quadrature signal, the in-phase signal and the quadrature signal representing a difference between a transmitted modulated carrier and a received radar signal.

9 . The integrated circuit of claim 1 , wherein the first programmable bandpass filter is programmed with a lower center frequency than the second programmable bandpass filter.

10 . The integrated circuit of claim 1 , wherein the first programmable gain amplifier is programmed with a lower gain than the second programmable gain amplifier.

11 . The integrated circuit of claim 1 , wherein the first programmable bandpass filter and the second programmable bandpass filter are programmable during receipt of a received radar signal, and wherein the first bandpass filter and the second bandpass filter are configured to be programmed to between an optimal center frequency and a maximum center frequency.

12 . The integrated circuit of claim 11 , wherein the received radar signal is a saw tooth frequency modulated continuous-wave radar signal, and the first programmable bandpass filter and the second programmable bandpass filter are configured to be programmed to the maximum center frequency during wait periods between each ramp in the saw tooth signal, and to the optimal center frequency during each ramp in the saw tooth signal.

13 . A method of processing a received radar signal in a radar receiver stage integrated circuit, comprising:
selecting a radar system configuration including a system type comprising an FMCW system or a Doppler system;
programming at least a first programmable gain amplifier stage to a first gain;
programming a first programmable bandpass filter stage to a first center frequency; and
programming a programmable low pass filter to a first low pass filter (LPF) gain.

14 . The method of claim 13 , wherein the method further includes
programming a second programmable gain amplifier to a second gain; and programming a second programmable bandpass filter stage to a second center frequency.

15 . The method of claim 14 , wherein the first center frequency is lower than the second center frequency.

16 . The method of claim 15 , wherein the first gain is lower gain than the second gain.

17 . The method of claim 16 , wherein the method further includes:
programming the first programmable bandpass filter stage to the first center frequency during a first portion of the radar signal; programming the second programmable bandpass filter stage to the second center frequency during the first portion of the received radar signal; and programming the first programmable bandpass filter stage and the second programmable bandpass filter stage to a maximum center frequency during a second portion of the received radar signal.

18 . The method of claim 17 , wherein the received radar signal is a saw tooth frequency modulated continuous-wave radar signal, and the first portion of the received radar signal is a ramp in the received radar signal and the second portion of the received radar signal is a wait period between ramps.

19 . The method of claim 13 , wherein the method further includes
programming a second programmable gain amplifier to be bypassed; and programming a second programmable bandpass filter to be bypassed.

Assignees

• Huawei Tech Co Ltd

Inventors

• Rauvola Roger
• Razmehr Nima

Classifications

• G01S13/342

  using sinusoidal modulation · CPC title

• G01S7/352 Primary

  Receivers · CPC title

• G01S7/4021

  of receivers · CPC title

• G01S13/0209

  Systems with very large relative bandwidth, i.e. larger than 10 %, e.g. baseband, pulse, carrier-free, ultrawideband · CPC title

• G01S7/358

  using I/Q processing · CPC title