Method for Producing Optoelectronic Semiconductor Devices and Optoelectronic Semiconductor Device

Patent metadata

Field	Value
Publication number	US-2022013700-A1
Application number	US-201917296149-A
Country	US
Kind code	A1
Filing date	Dec 4, 2019
Priority date	Dec 7, 2018
Publication date	Jan 13, 2022
Grant date	—

Abstract

In one embodiment, a method includes providing a chip carrier, creating holes for electrical through-connections in the chip carrier, producing a thin metallization in the holes, filling the metallized holes with a filling of a plastic, and applying optoelectronic semiconductor chips on the metallized holes so that the semiconductor chips are ohmically conductively connected with an associated metallization, wherein a mean thickness of the metallization in the holes is between 0.1 μm and 0.7 μm, inclusive, and wherein a diameter of the holes exceeds the mean thickness of the metallization by at least a factor of 10.

First claim

1 .- 17 . (canceled)

18 . A method for producing optoelectronic semiconductor devices, the method comprising:
providing a chip carrier, creating holes for electrical through-connections in the chip carrier, producing a thin metallization in the holes; filling the metallized holes with a filling of a plastic; and applying optoelectronic semiconductor chips on the metallized holes so that the semiconductor chips are ohmically conductively connected with an associated metallization, wherein a mean thickness of the metallization in the holes is between 0.1 μm and 0.7 μm, inclusive, and wherein a diameter of the holes exceeds the mean thickness of the metallization by at least a factor of 10.

19 . The method according to claim 18 , wherein the semiconductor chips cover the filling, and wherein the filling is still present in finished semiconductor devices.

20 . The method according to claim i 8 , further comprising:
removing the filling before applying the optoelectronic semiconductor chips.

21 . The method according to claim 18 ,
wherein filling the metallized holes comprises filling the metallized holes with a material in a liquid state, and wherein the material is subsequently photochemically and/or thermally cured in the holes.

22 . The method according to claim 18 , wherein filling the metallized holes comprises:
applying the filling over an entire surface; and subsequently planarizing the filling so that the filling is confined to the holes and is flush with the holes with a tolerance of at most 2% of a length of the holes.

23 . The method according to claim 18 , further comprising:
generating an oxide mask on the chip carrier thereby defining shapes of the holes, wherein the oxide mask is still present in finished semiconductor devices.

24 . The method according to claim 18 , further comprising:
forming a continuous electrical insulating layer which extends into the holes and completely covers a bottom surface of the holes, wherein the metallization is directly applied to the insulating layer.

25 . The method according to claim 24 , further comprising:
removing regions of the insulating layer where the insulating layer was previously applied to the bottom surface of the holes after applying the optoelectronic semiconductor chips.

26 . The method according to claim 18 , further comprising:
forming electrical connection surfaces for the semiconductor chips on a carrier top side of the chip carrier before applying the optoelectronic semiconductor chips, wherein the semiconductor chips are mounted on the connection surfaces by thin-film soldering, and wherein the connection surfaces have a thickness between 0.1 μm and 1 μm, inclusive.

27 . The method according to claim 26 ,
wherein applying the optoelectronic semiconductor chips comprises applying the optoelectronic semiconductor chips congruently to the connection surfaces with a tolerance of at most 15 μm, and wherein, viewed in a plan view of the connection surfaces, a mean edge length of the semiconductor chips is at most 60 μm.

28 . The method according to claim 18 , further comprising:
forming electrical contact regions on chip top sides of the semiconductor chips facing away from the chip carrier.

29 . The method according to claim 18 , further comprising:
embedding the mounted semiconductor chips in a fastening means, wherein the mounted semiconductor chips are attached to a temporary auxiliary carrier by the fastening means.

30 . The method according to claim 29 ,
wherein the chip carrier is located on a base carrier and is fastened to the base carrier by a metallic connection means layer, wherein the base carrier is removed after embedding the mounted semiconductor chips, and wherein contact metallizations for external electrical contacting of finished semiconductor devices are produced on sides of the holes facing away from the semiconductor chips in each case.

31 . The method according to claim 30 , wherein the contact metallization extends partially into the holes so that the contact metallization rises above the holes.

32 . The method according to claim 18 , further comprising:
performing separation through the chip carrier to the semiconductor devices, wherein separation is performed either after applying the optoelectronic semiconductor chips or before creating the holes.

33 . The method according to claim 18 , wherein the semiconductor chips are designed as flip chips.

34 . An optoelectronic semiconductor device manufactured according to the method of claim 18 , the semiconductor device comprising:
a chip carrier with at least one hole; a thin metallization on side walls of the hole and on a carrier top side of the chip carrier so that an electrical connection surface is formed on the carrier top side; a filling of a plastic in the hole so that the filling fills the metallization and thus the hole; and at least one optoelectronic semiconductor chip on the hole and on the connection surface such that an electrical through-connection for the semiconductor chip is formed through the chip carrier by the metallization in the hole, wherein the semiconductor chip has a mean edge length of at most 60 μm when viewed in a plan on the carrier top side.

35 . A method for producing optoelectronic semiconductor devices, the method comprising:
providing a chip carrier; creating holes for electrical through-connections in the chip carrier; generating a continuous electrical insulating layer which extends into the holes and completely covers a bottom surface of the holes; producing a thin metallization in the holes and applying the metallization directly to the electrical insulting layer; filling the metallized holes with a filling of a plastic; and applying optoelectronic semiconductor chips on the metallized holes so that the semiconductor chips are ohmically conductively connected with an associated metallization.

Assignees

• Osram Opto Semiconductors Gmbh

Inventors

• Porten Pascal
• Kämpf Mathias
• Zenger Marcus

Classifications

• H10W90/00

  Package configurations · CPC title

• H10H20/0364

  of interconnections · CPC title

• H10H20/8506

  Containers · CPC title

• H10H20/01

  Manufacture or treatment · CPC title

• H10H20/032

  of electrodes · CPC title