Mosfet having a drift region with a graded doping profile and methods of manufacturing thereof

Patent metadata

Field	Value
Publication number	US-2022013665-A1
Application number	US-202117482490-A
Country	US
Kind code	A1
Filing date	Sep 23, 2021
Priority date	Feb 5, 2020
Publication date	Jan 13, 2022
Grant date	—

Abstract

A vertical power semiconductor transistor device includes: a drain region of a first conductivity type; a body region of a second conductivity type; a drift region of the first conductivity type which separates the body region from the drain region; a source region of the first conductivity type separated from the drift region by the body region; a gate trench extending through the source and body regions and into the drift region, the gate trench including a gate electrode; and a field electrode in the gate trench or in a separate trench. The drift region has a generally linearly graded first doping profile which increases from the body region toward a bottom of the trench that includes the field electrode, and a graded second doping profile that increases at a greater rate than the first doping profile from an end of the first doping profile toward the drain region.

First claim

What is claimed is:

1 . A vertical power semiconductor transistor device, comprising:
a drain region of a first conductivity type; a body region of a second conductivity type opposite the first conductivity; a drift region of the first conductivity type and separating the body region from the drain region; a source region of the first conductivity type and separated from the drift region by the body region; a gate trench extending through the source region and the body region and into the drift region, the gate trench including a gate electrode; and a field electrode in the gate trench or in a separate trench, wherein the trench that includes the field electrode terminates before reaching the drain region such that a bottom of the trench that includes the field electrode is separated from the drain region by a section of the drift region, wherein the drift region has a generally linearly graded first doping profile which increases from the body region toward the bottom of the trench that includes the field electrode, and a graded second doping profile that increases at a greater rate than the first doping profile from an end of the first doping profile toward the drain region.

2 . The vertical power semiconductor transistor device of claim 1 , wherein the second doping profile is generally linearly graded and increases at a greater slope than the generally linearly graded first doping profile.

3 . The vertical power semiconductor transistor device of claim 1 , wherein the second doping profile is exponentially graded.

4 . The vertical power semiconductor transistor device of claim 1 , wherein the second doping profile increases from a first doping level adjacent the first doping profile to a second doping level adjacent the drain region, and wherein the second doping level is in a range of 10 times to 100 times greater than the first doping level.

5 . The vertical power semiconductor transistor device of claim 1 , wherein the section of the drift region that separates the bottom of the trench that includes the field electrode from the drain region has the graded second doping profile.

6 . The vertical power semiconductor transistor device of claim 1 , wherein the first doping profile ends and the second doping profile begins at or near a level within the drift region which corresponds to the bottom of the trench that includes the field electrode.

7 . The vertical power semiconductor transistor device of claim 1 , wherein the field electrode is in a different trench than the gate electrode, and wherein the field electrode is needle-shaped in a lengthwise extension of the field electrode.

8 . The vertical power semiconductor transistor device of claim 1 , wherein the first doping profile of the drift region extends to a depth of at least ¾ of a depth of the trench that includes the field electrode.

9 . The vertical power semiconductor transistor device of claim 1 , wherein the first doping profile increases from a first doping level adjacent the body region to a second doping level adjacent the second doping profile, and wherein the second doping level is at least three times greater than the first doping level.

10 . The vertical power semiconductor transistor device of claim 1 , wherein the drain region is formed by a semiconductor substrate of the first conductivity type, wherein the drift region, the body region and the source region are formed in a single epitaxial layer grown on the semiconductor substrate, wherein the semiconductor substrate is doped with first dopants of the first conductivity type, wherein the second doping profile for the drift region arises from second dopants of the first conductivity type which out-diffused from the semiconductor substrate, and wherein the second dopants have a faster diffusion rate than the first dopants.

11 . The vertical power semiconductor transistor device of claim 1 , wherein the drain region is formed by a semiconductor substrate of the first conductivity type, wherein the second doping profile for the drift region is present in a first epitaxial layer grown on the semiconductor substrate, wherein the first doping profile for the drift region is present in a second epitaxial layer grown on the first epitaxial layer, and wherein in the drift region the first epitaxial layer is thinner than the second epitaxial layer and has a higher average doping concentration.

12 . A method of producing a vertical power semiconductor transistor device, the method comprising:
forming a drain region of a first conductivity type, a drift region of the first conductivity type, a body region of a second conductivity type opposite the first conductivity and which is separated from the drain region by the drift region, and a source region of the first conductivity type and which is separated from the drift region by the body region; forming a gate trench which extends through the source region and the body region and into the drift region, the gate trench including a gate electrode; forming a field electrode in the gate trench or in a separate trench, wherein the trench that includes the field electrode terminates before reaching the drain region such that a bottom of the trench that includes the field electrode is separated from the drain region by a section of the drift region; establishing a generally linearly graded first doping profile in the drift region and which increases from the body region toward the bottom of the trench that includes the field electrode; and establishing a graded second doping profile in the drift region and which increases at a greater rate than the first doping profile from an end of the first doping profile toward the drain region.

13 . The method of claim 12 , wherein the second doping profile is generally linearly graded and increases at a greater slope than the generally linearly graded first doping profile, or wherein the second doping profile is exponentially graded.

14 . The method of claim 12 , wherein the drain region is formed by a semiconductor substrate of the first conductivity type, and wherein establishing the graded second doping profile in the drift region comprises:
growing a single epitaxial layer on the semiconductor substrate, the single epitaxial layer having the generally linearly graded first doping profile throughout; and out-diffusing dopants of the first conductivity from the semiconductor substrate into the adjoining single epitaxial layer, the out-diffused dopants of the first conductivity reaching a penetration depth within the single epitaxial layer as measured from the semiconductor substrate and which is less than the thickness of the drift region, the out-diffused dopants of the first conductivity converting the generally linearly graded first doping profile to the graded second doping profile over the penetration depth.

15 . The method of claim 14 , wherein the dopants of the first conductivity are out-diffused from the semiconductor substrate into the adjoining single epitaxial layer by thermal processing applied during formation of the body region and the source region.

16 . The method of claim 14 , wherein the semiconductor substrate is doped with first dopants of the first conductivity type, and wherein out-diffusing the dopants of the first conductivity from the semiconductor substrate into the adjoining single epitaxial layer comprises:
providing second dopants of the first conductivity type in the semiconductor substrate, the second dopants having a faster diffusion rate than the first dopants; and after providing the second dopants and after growing the single

Assignees

• Infineon Technologies Austria Ag

Inventors

• Siemieniec Ralf
• Laforet David
• Ouvrard Cédric

Classifications

• H10D64/2527

  for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies · CPC title

• H10D30/0297

  using recessing of the gate electrodes, e.g. to form trench gate electrodes · CPC title

• H10D62/127

  of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs · CPC title

• H10D30/668 Primary

  having trench gate electrodes, e.g. UMOS transistors · CPC title

• H10D64/117

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title