Solid-state imaging device and electronic apparatus

Patent metadata

Field	Value
Publication number	US-2022013557-A1
Application number	US-201917293132-A
Country	US
Kind code	A1
Filing date	Nov 19, 2019
Priority date	Nov 19, 2018
Publication date	Jan 13, 2022
Grant date	—

Abstract

There is provided a solid-state imaging device having a configuration suitable for high integration. The solid-state imaging device includes a semiconductor layer, a photoelectric converter, a storage capacitor, and a first transistor. The photoelectric converter is provided in the semiconductor layer, and generates an electric charge corresponding to a received light amount by photoelectric conversion. The storage capacitor is provided on the semiconductor layer, and includes a first insulating film having a first electrical film thickness. The first transistor is provided on the semiconductor layer, and includes a second insulating film having a second electrical film thickness larger than the first electrical film thickness.

First claim

What is claimed is:

1 . A solid-state imaging device comprising:
a semiconductor layer; a photoelectric converter that is provided in the semiconductor layer, and generates an electric charge corresponding to a received light amount by photoelectric conversion; a storage capacitor that is provided on the semiconductor layer, and includes a first insulating film having a first electrical film thickness; and a first transistor that is provided on the semiconductor layer, and includes a second insulating film having a second electrical film thickness larger than the first electrical film thickness.

2 . The solid-state imaging device according to claim 1 , further comprising a second transistor that includes a third insulating film having a third electrical film thickness smaller than the second electrical film thickness.

3 . The solid-state imaging device according to claim 2 , wherein the second transistor comprises an amplification transistor, and the third insulating film comprises a gate insulating film of the amplification transistor.

4 . The solid-state imaging device according to claim 1 , wherein the storage capacitor is stacked at a position overlapping the photoelectric converter in a thickness direction of the semiconductor layer.

5 . The solid-state imaging device according to claim 4 , wherein
the first transistor comprises a vertical transistor including a gate electrode, as a second electrically conductive layer, extending in the thickness direction of the semiconductor layer, and the second insulating film comprises a gate insulating film of the vertical transistor.

6 . The solid-state imaging device according to claim 5 , wherein a maximum value of a physical film thickness of the first insulating film is smaller than a minimum value of a physical film thickness of the second insulating film.

7 . The solid-state imaging device according to claim 5 , wherein
the gate electrode of the vertical transistor includes a plug inserted into a trench that is formed in the semiconductor layer and extends in the thickness direction, and the trench has a wall surface and a bottom surface entirely covered by the second insulating film.

8 . The solid-state imaging device according to claim 1 , wherein the storage capacitor comprises a MOS capacitor.

9 . The solid-state imaging device according to claim 8 , wherein the MOS capacitor is of a planar type.

10 . The solid-state imaging device according to claim 8 , wherein the MOS capacitor is of a trench type.

11 . The solid-state imaging device according to claim 1 , wherein the storage capacitor stores the electric charge generated by the photoelectric converter.

12 . The solid-state imaging device according to claim 1 , further comprising an adjacent pixel provided in the semiconductor layer to be disposed adjacent to a pixel including the photoelectric converter and the storage capacitor, wherein
the adjacent pixel includes an adjacent photoelectric converter that generates an electric charge corresponding to a received light amount by photoelectric conversion, and the storage capacitor stores the electric charge generated by the photoelectric converter, and also stores the electric charge generated by the adjacent photoelectric converter.

13 . The solid-state imaging device according to claim 12 , wherein the storage capacitor is provided over both the photoelectric converter and the adjacent photoelectric converter in an in-plane direction of the semiconductor layer.

14 . The solid-state imaging device according to claim 12 , wherein sensitivity of the photoelectric converter is higher than sensitivity of the adjacent photoelectric converter.

15 . The solid-state imaging device according to claim 1 , further comprising an adjacent pixel provided in the semiconductor layer to be disposed adjacent to a pixel including the photoelectric converter and the storage capacitor, wherein
the adjacent pixel includes an adjacent photoelectric converter that generates an electric charge corresponding to a received light amount by photoelectric conversion, and the storage capacitor stores the electric charge generated by the adjacent photoelectric converter.

16 . The solid-state imaging device according to claim 1 , wherein the first transistor comprises a transfer transistor that transfers the electric charge from the photoelectric converter to a transfer destination.

17 . The solid-state imaging device according to claim 16 , further comprising an electric-charge voltage converter as the transfer destination, the electric-charge voltage converter that is provided in the semiconductor layer, and converts the electric charge generated by photoelectric converter into a voltage.

18 . The solid-state imaging device according to claim 17 , wherein the storage capacitor is coupled to the electric charge-voltage converter.

19 . The solid-state imaging device according to claim 17 , wherein the storage capacitor comprises an electric charge holding section as the transfer destination, the electric charge holding section that is provided between the photoelectric converter and the electric charge-voltage converter, and temporarily holds the electric charge generated by the photoelectric converter before transferring the electric charge to the electric charge-voltage converter.

20 . The solid-state imaging device according to claim 17 , further comprising a switching section that is provided between the storage capacitor and the electric charge-voltage converter, and performs electrical coupling between the storage capacitor and the electric charge-voltage converter and electrical disconnection between the storage capacitor and the electric charge-voltage converter.

21 . The solid-state imaging device according to claim 1 , wherein a first dielectric constant of the first insulating film is higher than a second dielectric constant of the second insulating film.

22 . The solid-state imaging device according to claim 1 , wherein a first physical film thickness of the first insulating film is smaller than a second physical film thickness of the second insulating film.

23 . A solid-state imaging device comprising:
a semiconductor layer; a photoelectric converter that is provided in the semiconductor layer, and generates an electric charge corresponding to a received light amount by photoelectric conversion; a storage capacitor that is provided on the semiconductor layer, and includes a first insulating film having a first dielectric strength voltage; and a first transistor that is provided on the semiconductor layer, and includes a second insulating film having a second dielectric strength voltage higher than the first dielectric strength voltage.

24 . An electronic apparatus provided with a solid-state imaging device, the solid-state imaging device comprising:
a semiconductor layer; a photoelectric converter that is provided in the semiconductor layer, and generates an electric charge corresponding to a received light amount by photoelectric conversion; a storage capacitor that is provided on the semiconductor layer, and includes a first insulating film having a first electrical film thickness; and a first transistor that is provided on the semiconductor layer, and includes a second insulating film having a second electrical film thickness larger than the first electrical film thickness.

Assignees

• Sony Semiconductor Solutions Corp

Inventors

• Furuya Shogo
• Sakano Yorito
• Takahashi Ryo
• Suzuki Atsushi
• Yoshikawa Ryoichi
• Suenaga Jun
• Koga Shinichi
• Chiba Yohei
• SHIOYAMA Tadamasa

Classifications

• H10F39/811

  Interconnections · CPC title

• H10F39/802

  Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes · CPC title

• H10F39/803 Primary

  Pixels having integrated switching, control, storage or amplification elements · CPC title

• H10F39/8057

  Optical shielding · CPC title

• H10F39/8053

  Colour filters · CPC title