Apparatus for managing battery and method thereof
US-2024418786-A1 · Dec 19, 2024 · US
US2022011375A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2022011375-A1 |
| Application number | US-201917294780-A |
| Country | US |
| Kind code | A1 |
| Filing date | Nov 12, 2019 |
| Priority date | Nov 22, 2018 |
| Publication date | Jan 13, 2022 |
| Grant date | — |
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A semiconductor device that tests and/or monitors each of batteries provided in an assembled battery is provided. The semiconductor device includes a hysteresis comparator and a circuit, and the circuit has a function of setting a high-level side threshold voltage and a low-level side voltage of the hysteresis comparator. The circuit includes first and second capacitors. A first terminal of the first capacitor is electrically connected to a high-level side reference potential input terminal of the hysteresis comparator and a first terminal of the second capacitor is electrically connected to a low-level side reference potential input terminal of the hysteresis comparator. After a first reference potential is input to the high-level side reference potential input terminal and a second reference potential is input to the low-level side reference potential input terminal, a negative electrode of a cell is electrically connected to each second terminal of the first and second capacitors, whereby the potential of each first terminal of the first and second capacitors is changed.
Opening claim text (preview).
1 . A semiconductor device comprising a circuit and a hysteresis comparator, wherein the circuit comprises a first input terminal, wherein the hysteresis comparator comprises a first reference potential input terminal and a second reference potential input terminal, and wherein the circuit is configured to change a first reference potential of the first reference potential input terminal and a second reference potential of the second reference potential input terminal in accordance with a first potential input to the first input terminal. 2 . A power storage device comprising the semiconductor device according to claim 1 and a cell, wherein the circuit comprises a second input terminal, wherein the cell is configured to charge electricity, wherein a positive electrode terminal of the cell is electrically connected to the second input terminal, wherein a negative electrode terminal of the cell is electrically connected to the first input terminal, wherein the circuit has a function of generating is configured to generate a third potential corresponding to the first potential of a negative electrode of the cell that is input to the first input terminal and a second potential of a positive electrode of the cell that is input to the second input terminal, and wherein the third potential is input to an input terminal of the hysteresis comparator. 3 . The power storage device according to claim 2 , wherein the circuit comprises a first switch to a sixth switch, a first resistor, a second resistor, a first capacitor, a second capacitor, and the second input terminal, wherein a first terminal of the first resistor is electrically connected to a first terminal of the second resistor and the input terminal of the hysteresis comparator, wherein a first terminal of the first switch is electrically connected to a first terminal of the first capacitor and the first reference potential input terminal, wherein a first terminal of the second switch is electrically connected to a second terminal of the first capacitor, wherein a first terminal of the third switch is electrically connected to the second terminal of the first capacitor, wherein a first terminal of the fourth switch is electrically connected to a first terminal of the second capacitor and the second reference potential input terminal, wherein a first terminal of the fifth switch is electrically connected to a second terminal of the second capacitor, wherein a first terminal of the sixth switch is electrically connected to the second terminal of the second capacitor, wherein the first input terminal is electrically connected to a second terminal of the third switch and a second terminal of the sixth switch, wherein the second input terminal is electrically connected to a second terminal of the first resistor, and wherein the circuit has: a function of retaining the first reference potential in the first terminal of the first capacitor; a function of retaining the second reference potential in the first terminal of the second capacitor; and a function of changing the first reference potential retained in the first terminal of the first capacitor and the second reference potential retained in the first terminal of the second capacitor owing to capacitive coupling by input of the first potential to the first input terminal at the time when the first switch, the second switch, the fourth switch, and the fifth switch are each in an off state and the third switch and the sixth switch are each in an on state. 4 . The power storage device according to claim 3 , wherein at least one of the first switch to the sixth switch comprises a transistor, and wherein the transistor comprises a metal oxide in a channel formation region. 5 . A power storage device comprising a circuit and a cell, wherein the circuit comprises a first input terminal, a second input terminal, a first potential retention portion, and a second potential retention portion, wherein the cell is configured to charge electricity, wherein a negative electrode terminal of the cell is electrically connected to the first input terminal, wherein a positive electrode terminal of the cell is electrically connected to the second input terminal, and wherein the circuit has: a function of retaining a first reference potential in the first potential retention portion; a function of retaining a second reference potential in the second potential retention portion; and a function of changing the first reference potential of the first potential retention portion and the second reference potential of the second potential retention portion, in accordance with a first potential of the negative electrode terminal of the cell that is input to the first input terminal. 6 . The power storage device according to claim 5 , wherein the circuit comprises a first switch to a sixth switch, a first resistor, a second resistor, a first capacitor, and a second capacitor, wherein a first terminal of the first resistor is electrically connected to a first terminal of the second resistor, wherein the first potential retention portion is electrically connected to a first terminal of the first switch and a first terminal of the first capacitor, wherein a first terminal of the second switch is electrically connected to a second terminal of the first capacitor, wherein a first terminal of the third switch is electrically connected to the second terminal of the first capacitor, wherein the second potential retention portion is electrically connected to a first terminal of the fourth switch and a first terminal of the second capacitor, wherein a first terminal of the fifth switch is electrically connected to a second terminal of the second capacitor, wherein a first terminal of the sixth switch is electrically connected to the second terminal of the second capacitor, wherein the first input terminal is electrically connected to a second terminal of the third switch and a second terminal of the sixth switch, wherein the second input terminal is electrically connected to a second terminal of the first resistor, and wherein the circuit is configured to change the first reference potential retained in the first potential retention portion and the second reference potential retained in the second potential retention portion owing to capacitive coupling by input of the first potential to the first input terminal at the time when the first switch, the second switch, the fourth switch, and the fifth switch are each in an off state and the third switch and the sixth switch are each in an on state. 7 . The power storage device according to claim 6 , wherein at least one of the first switch to the sixth switch comprises a transistor, and wherein the transistor comprises a metal oxide in a channel formation region. 8 . An electronic device comprising the power storage device according to claim 2 , and a housing. 9 . An electronic device comprising the power storage device according to- claim 7 , and a housing
the cycle being controlled or terminated in response to electric parameters · CPC title
characterised by the mechanical construction · CPC title
including monitoring or indicating arrangements · CPC title
against overcharge · CPC title
against overdischarge · CPC title
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