Imaging systems with improved circuitry to provide boosted control signals

Patent metadata

Field	Value
Publication number	US-2021400215-A1
Application number	US-202117446774-A
Country	US
Kind code	A1
Filing date	Sep 2, 2021
Priority date	Aug 21, 2019
Publication date	Dec 23, 2021
Grant date	—

Abstract

An image sensor having rows and columns of image pixels may include row control circuitry that controls voltages that are sent to each row of the image pixels. The row control circuitry may include booster circuitry that converts a positive power supply voltage (such as 2.8V) to voltages that are negative or otherwise less than the positive power supply voltage and/or greater than the positive power supply voltage. The booster circuitry may have a plurality of switches that control an input to an amplifier, thereby allowing the circuitry to produce any desired voltage in a given range. The booster circuitry output may be shared between multiple rows of the image pixels, and the produced boosted circuitry may be fed to any desired one or more of the rows of image pixels.

First claim

What is claimed is:

1 . An image sensor comprising:
an array of imaging pixels having rows and columns of pixels; and row control circuitry coupled to the rows of pixels, wherein the row control circuitry comprises booster circuitry that is shared between multiple rows of pixels, wherein the booster circuitry comprises an amplifier and a plurality of switches that are configured to produce an output voltage from a power supply voltage, and wherein the switches are configured to be placed in a first mode during pre-charge operations to output a first voltage with the booster circuitry, to be placed in a second mode during pre-charge operations to output a second voltage that is different from the first voltage, to be placed in a third mode during pre-charge operations to output a third voltage that is different from the first and second voltages, and to be placed in a fourth mode during pre-charge operations to output a fourth voltage that is different from the first, second, and third voltages.

2 . The image sensor defined in claim 1 wherein the power supply voltage is 2.8V.

3 . The image sensor defined in claim 2 wherein the first voltage is between −1.0V and 0V.

4 . The image sensor defined in claim 3 wherein the second voltage is 0V to 2.0V.

5 . The image sensor defined in claim 4 wherein the third voltage is greater than 2.0V.

6 . The image sensor defined in claim 5 wherein the fourth voltage is greater than 2.8V.

7 . The image sensor defined in claim 1 wherein the power supply voltage is a positive voltage and the first voltage is a negative voltage.

8 . The image sensor defined in claim 7 wherein the fourth voltage is greater than the power supply voltage.

9 . The image sensor defined in claim 1 wherein each row of pixels has a switch coupled to the booster circuitry, and wherein the output voltage is configured to be fed to a respective row of pixels by turning on the switch coupled to the booster circuitry.

10 . An image sensor comprising:
an array of imaging pixels having rows and columns of pixels; and row control circuitry coupled to the rows of pixels, wherein the row control circuitry comprises booster circuitry that is configured to produce output voltages from a power supply voltage, and wherein at least one of the output voltages is greater than the power supply voltage.

11 . The image sensor defined in claim 10 wherein the power supply voltage is positive.

12 . The image sensor defined in claim 11 wherein at least one additional output voltage of the output voltages produced by the booster circuitry is negative.

13 . The image sensor defined in claim 12 wherein the power supply voltage is 2.8V and wherein the at least one additional output voltage is −1.0V and 0V.

14 . The image sensor defined in claim 10 wherein the power supply voltage is 2.8V and the at least one output voltage is greater than 2.8V.

15 . The image sensor defined in claim 14 wherein at least one additional output voltage of the output voltages produced by the booster circuitry is between −1.0V and 2.0V.

16 . An image sensor comprising:
an array of imaging pixels having rows and columns of pixels; and row control circuitry coupled to the rows of pixels, wherein the row control circuitry comprises booster circuitry that is configured to produce a plurality of output voltages from a positive power supply voltage, wherein a first output voltage of the plurality of output voltages is negative, and wherein a second output voltage of the plurality of output voltages is greater than the positive power supply voltage.

17 . The image sensor defined in claim 16 wherein the first output voltage is between −1.0V and 0V and wherein the second output voltage is greater than 2.8V.

18 . The image sensor defined in claim 17 wherein the positive power supply voltage is 2.8V, a third output voltage of the plurality of output voltages is between 0V and 2.0V, and a fourth output voltage of the plurality of output voltages is greater than 2.0V.

19 . The image sensor defined in claim 16 wherein each row of pixels has a switch coupled to the booster circuitry, and wherein the plurality of output voltages are configured to be fed to a respective row of pixels by turning on the switch coupled to the booster circuitry.

20 . The image sensor defined in claim 19 wherein the booster circuitry is shared between multiple rows of pixels and wherein the booster circuitry comprises an amplifier and a plurality of switches that are configured to produce the plurality of output voltages.

Assignees

• Semiconductor Components Ind Llc

Inventors

• Gurindagunta Sundaraiah

Classifications

• H04N25/709 Primary

  Circuitry for control of the power supply · CPC title

• H04N25/78

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

• H04N25/779

  Circuitry for scanning or addressing the pixel array · CPC title

• H04N25/766

  comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power · CPC title

• H04N25/74

  Circuitry for scanning or addressing the pixel array · CPC title