Power storage device and method for operating power storage device

US2021384751A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2021384751-A1
Application numberUS-201917286088-A
CountryUS
Kind codeA1
Filing dateOct 16, 2019
Priority dateOct 25, 2018
Publication dateDec 9, 2021
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A battery control circuit with a novel structure, a battery protection circuit with a novel structure, and a power storage device including either of the battery circuits are provided. The power storage device includes a first circuit portion, a second circuit portion, a third circuit portion, and a secondary battery; the first circuit portion has a function of controlling charging of the secondary battery; the first circuit portion has a function of supplying the start time and the end time of the charging of the secondary battery to the third circuit portion; the second circuit portion has functions of generating a first voltage and a first current and supplying them to the third circuit portion; the third circuit portion has a function of generating a second voltage by charging the first current in a capacitor; and the third circuit portion has a function of comparing the first voltage and the second voltage.

First claim

Opening claim text (preview).

1 . A power storage device comprising a first circuit portion, a second circuit portion, a third circuit portion, and a secondary battery, wherein the third circuit portion comprises a comparator and a capacitor, wherein the first circuit portion is configured to control a charging of the secondary battery, wherein the first circuit portion is configured to inform a start of the charging of the secondary battery to the third circuit portion, wherein the second circuit portion is configured to generate a first voltage and a first current and supplying the first voltage and the first current to the third circuit portion, wherein the third circuit portion is configured to generate a second voltage by charging the first current in the capacitor, and wherein the comparator is configured to compare the first voltage and the second voltage. 2 . The power storage device according to claim 1 , wherein the second circuit portion generates the first voltage by converting a digital signal supplied from the first circuit portion, and wherein the first voltage is an analog signal. 3 . The power storage device according to claim 1 , wherein the third circuit portion comprises a first transistor, wherein a channel formation region of the first transistor comprises indium, zinc, and an element M, wherein the element M is one or more elements selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium, wherein one of a non-inverting input terminal and an inverting input terminal of the comparator is electrically connected to one electrode of the capacitor, wherein the other of the non-inverting input terminal and the inverting input terminal of the comparator is electrically connected to one of a source and a drain of the first transistor, and wherein the power storage device is configured to retain the first voltage in the one of the source and the drain of the first transistor by turning off the first transistor. 4 . The power storage device according to claim 1 , wherein the third circuit portion comprises a second transistor, wherein a channel formation region of the second transistor comprises indium, zinc, and an element M, wherein the element M is one or more elements selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium, and wherein one of a source and a drain of the second transistor is electrically connected to one electrode of the capacitor. 5 . A method for operating a power storage device comprising a first circuit portion, a second circuit portion, a third circuit portion, and a secondary battery, wherein the first circuit portion is configured to control a charging of the secondary battery, the method comprising: a first step in which the second circuit portion generates a first voltage and a first current; a second step in which the first voltage and the first current are supplied to the third circuit portion; a third step in which a current is supplied to the secondary battery to start the charging; a fourth step in which a first signal for informing the start of the charging in the third step is supplied from the first circuit portion to the third circuit portion; a fifth step in which the third circuit portion generates a second voltage corresponding to an elapsed time from the start time of the charging; and a sixth step in which the first voltage and the second voltage are compared. 6 . The method for operating the power storage device according to claim 5 , wherein the third circuit portion comprises a capacitor, and wherein in the fifth step, the third circuit portion charges the capacitor with electric charges with an amount corresponding to a product of the first current and the elapsed time, and the second voltage is calculated as a potential difference between electrodes on both ends of the capacitor. 7 . The method for operating the power storage device according to claim 5 , wherein in the first step, the second circuit portion generates the first voltage by converting a digital signal supplied from the first circuit portion, and wherein the first voltage is an analog signal. 8 . The method for operating the power storage device according to claim 5 , wherein the third circuit portion comprises a comparator and a transistor, wherein one of a non-inverting input terminal and an inverting input terminal of the comparator is electrically connected to one of a source and a drain of the transistor, wherein in the second step, the first voltage is supplied to the one of the non-inverting input terminal and the inverting input terminal of the comparator, wherein in the third step to the sixth step, the transistor is turned off to retain the first voltage supplied to the one of the non-inverting input terminal and the inverting input terminal of the comparator, and wherein in the fifth step, the second voltage is supplied to the other of the non-inverting input terminal and the inverting input terminal of the comparator. 9 . The method for operating the power storage device according to claim 5 , wherein the third circuit portion comprises a capacitor, wherein a charging of the first current to the capacitor starts in accordance with the first signal, and wherein the second voltage corresponds to a potential difference between electrodes on both ends of the capacitor. 10 . A method for operating a power storage device comprising a first circuit portion, a second circuit portion, a third circuit portion, a temperature sensor, and a secondary battery, wherein the first circuit portion comprises an arithmetic circuit and a memory, wherein the first circuit portion is configured to control a charging of the secondary battery, the method comprising: a first step in which a current is supplied to the secondary battery to start a first charging at a first time; a second step in which the first charging is terminated at a second time; a third step in which a temperature measured by the temperature sensor, the first time, and the second time are supplied to the memory; a fourth step in which the arithmetic circuit in the first circuit portion performs an arithmetic operation using the temperature, the first time, and the second time stored in the memory to determine a level of a first voltage; a fifth step in which the second circuit portion generates the first voltage whose level is determined by the arithmetic operation and a first current; a sixth step in which the first voltage and the first current are supplied to the third circuit portion; a seventh step in which a current is supplied to the secondary battery to start a second charging; an eighth step in which a first signal for informing the start of the second charging in the seventh step is supplied from the first circuit portion to the third circuit portion; a ninth step in which the third circuit portion generates a second voltage corresponding to an elapsed time from the start time of the second charging; and a tenth step in which the first voltage and the second voltage are compared, and wherein the first charging is a CC charging and the second charging is a CV charging. 11 . The method for operating the power storage device according to claim 10 , wherein the third circuit portion comprises a capacitor, and wherein in the eighth step, the third circuit portion charges the capacitor with electric charges with an amount corresponding to a product of the

Assignees

Inventors

Classifications

  • with prioritisation of loads or sources · CPC title

  • including safety or protection arrangements · CPC title

  • H02J7/933Primary

    the cycle being controlled or terminated in response to electric parameters · CPC title

  • of the battery · CPC title

  • in response to battery voltage · CPC title

Patent family

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What does patent US2021384751A1 cover?
A battery control circuit with a novel structure, a battery protection circuit with a novel structure, and a power storage device including either of the battery circuits are provided. The power storage device includes a first circuit portion, a second circuit portion, a third circuit portion, and a secondary battery; the first circuit portion has a function of controlling charging of the secon…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H02J7/933. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 09 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).