Method for producing wiring substrate

US2021378103A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2021378103-A1
Application numberUS-202117324194-A
CountryUS
Kind codeA1
Filing dateMay 19, 2021
Priority dateJun 2, 2020
Publication dateDec 2, 2021
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure provides a method for producing a wiring substrate. A seeded substrate is first prepared. The seeded substrate includes an insulation substrate, a conductive undercoat layer having a hydrophilic surface and provided on the insulation substrate, a conductive seed layer provided on a first region of the surface of the undercoat layer, the first region having a predetermined pattern, and a water-repellent layer on the second region of the surface of the undercoat layer, the second region being a region other than the first region. Subsequently, a metal layer is formed on the seed layer. A voltage is applied between the anode and the seed layer while a solid electrolyte membrane being disposed between the seeded substrate and the anode, and the solid electrolyte membrane and the seed layer being pressed into contact with each other. Thereafter, the water-repellent layer and the undercoat layer are etched.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method for producing a wiring substrate comprising an insulation substrate and a wiring layer having a predetermined wiring pattern and provided on the insulation substrate, the method comprising steps of: (a) preparing a seeded substrate comprising: the insulation substrate; a conductive undercoat layer provided on the insulation substrate and having a hydrophilic surface; a conductive seed layer provided on a first region of the surface of the undercoat layer, the first region having a predetermined pattern corresponding to the wiring pattern; and a water-repellent layer provided on a second region of the surface of the undercoat layer, the second region being a region other than the first region; (b) forming a metal layer on a surface of the seed layer, wherein a voltage is applied between an anode and the seed layer while a solid electrolyte membrane containing a metal ion-containing solution being disposed between the seeded substrate and the anode, and the solid electrolyte membrane and the seed layer being pressed into contact with each other; and (c) etching the water-repellent layer and the undercoat layer. 2 . The method according to claim 1 , wherein the step (a) comprises, in the sequence set forth: forming the undercoat layer on the insulation substrate; forming the seed layer on the first region of the surface of the undercoat layer; and forming the water-repellent layer on the second region of the surface of the undercoat layer. 3 . The method according to claim 1 , wherein the step (a) comprises, in the sequence set forth: forming the undercoat layer on the insulation substrate; forming the water-repellent layer on the second region of the surface of the undercoat layer; and forming the seed layer on the first region of the surface of the undercoat layer. 4 . The method according to claim 1 , wherein the undercoat layer has a hydroxyl group on its surface. 5 . The method according to claim wherein the step (a) comprises forming the water-repellent layer using organic silane or organic silazane.

Assignees

Inventors

Classifications

  • H10W70/05Primary

    of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) · CPC title

  • Differences in wettability, e.g. hydrophilic or hydrophobic areas · CPC title

  • H05K3/108Primary

    by semi-additive methods; masks therefor (characterised by metallic etch mask H05K3/062; electroplating methods or apparatus H05K3/241) · CPC title

  • Semiconductors first coated with a seed layer or a conductive layer · CPC title

  • of copper · CPC title

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What does patent US2021378103A1 cover?
The present disclosure provides a method for producing a wiring substrate. A seeded substrate is first prepared. The seeded substrate includes an insulation substrate, a conductive undercoat layer having a hydrophilic surface and provided on the insulation substrate, a conductive seed layer provided on a first region of the surface of the undercoat layer, the first region having a predetermined…
Who is the assignee on this patent?
Toyota Motor Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W70/05. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 02 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).