Amplification interface, and corresponding measurement system and method for calibrating an amplification interface

Patent metadata

Field	Value
Publication number	US-2021336593-A1
Application number	US-202117372262-A
Country	US
Kind code	A1
Filing date	Jul 9, 2021
Priority date	Feb 8, 2019
Publication date	Oct 28, 2021
Grant date	—

Abstract

A thermally-isolated-metal-oxide-semiconducting (TMOS) sensor has inputs coupled to first and second nodes to receive first and second bias currents, and an output coupled to a third node. A tail has a first conduction terminal coupled to the third node and a second conduction terminal coupled to a reference voltage. A control circuit applies a control signal to a control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode voltage at the first and second nodes is equal to a reference common mode voltage. A differential current integrator has a first input terminal coupled to the second node and a second input terminal coupled to the first node, and provides an output voltage indicative of an integral of a difference between a first output current at the first input terminal and a second output current at the second input terminal.

First claim

1 . An electronic device, comprising:
a thermally-isolated metal-oxide semiconducting (TMOS) sensor having a first current input terminal coupled to a first node to receive a first bias current, a second current input terminal coupled to a second node to receive a second bias current, and a current output terminal coupled to a third node; a tail transistor having a first conduction terminal coupled to the third node, a second conduction terminal coupled to a reference voltage, and a control terminal; a control circuit configured to generate a control signal applied to the control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode of voltages at the first and second nodes is equal to a reference common mode voltage; and a differential current integrator comprising a first input terminal coupled to the second node and a second input terminal coupled to the first node, wherein said differential current integrator is configured to provide an output voltage indicative of an integral of a difference between a first output current at the first input terminal and a second output current received at said second input terminal.

2 . The electronic device of claim 1 , wherein the TMOS sensor comprises:
a first TMOS transistor having a drain coupled to the first node, a source coupled to the third node, and a gate; and a second TMOS transistor having a drain coupled to the second node, a source coupled to the third node, and a gate coupled to the gate of the first TMOS transistor.

3 . The electronic device of claim 2 , wherein the first and second TMOS transistors are configured to operate in a subthreshold region.

4 . The electronic device of claim 3 , wherein the first and second TMOS transistors are sized with a width to length ratio such that gate to source voltages thereof are less than threshold voltages of the first and second TMOS transistors.

5 . The electronic device of claim 2 , wherein the first and second bias currents are equal.

6 . The electronic device of claim 2 , wherein the first and second TMOS transistors form an amplifier having a voltage offset; and further comprising a current generator configured to apply correction currents to the first and second nodes that compensate for the voltage offset.

7 . The electronic device of claim 1 , further comprising a current generator configured to apply a first correction current to the first node and a second correction current to the second node.

8 . The electronic device of claim 7 , wherein the first and second correction currents are equal in magnitude but opposite in sign.

9 . The electronic device of claim 1 , wherein a magnitude of each of the first and second bias currents is proportional to absolute temperature.

10 . The electronic device of claim 1 , wherein the differential current integrator comprises:
a differential operational amplifier; a first capacitor connected between a first output terminal of said differential operational amplifier and the first input terminal; a second capacitor connected between a second output terminal of said differential operational amplifier and the second input terminal; first and second electronic switches respectively connected in parallel with said first and second capacitors, wherein said first and second electronic switches are driven via a reset signal; a control logic circuit configured to:
generate said reset signal such that said differential current integrator is periodically reset during a reset interval and activated during a measurement interval; and
during each measurement interval, set said reset signal to a first logic value for a sampling interval and set said reset signal to a second logic value for a hold interval;
an RC oscillator having a capacitor and a resistor which define an oscillation period of said RC oscillator, and wherein said control circuit is configured to generate said reset signal such that said sampling interval corresponds to a multiple of said oscillation period of said RC oscillator.

11 . The electronic device of claim 10 , wherein said control circuit is configured to generate said reset signal such that said sampling interval corresponds to a multiple of said oscillation period of said RC oscillator.

12 . The electronic device of claim 11 , further comprising first and second current generators generating the first and second bias currents; and wherein the first and second current generators, and the RC oscillator, are collectively configured such that a magnitude of the first bias current multiplied by a frequency of the RC oscillator remains constant over temperature, and such that a magnitude of the second bias current multiplied by the frequency of the RC oscillator remains constant over temperature.

13 . The electronic device of claim 12 , further comprising:
a first chopper circuit connected between the first and second input terminal of said differential current integrator, and said first and said second nodes; a second chopper circuit connected between said first current generator and said second current generator, and said first and said second nodes; and a third chopper circuit connected between said first and second output terminals of said differential current integrator.

14 . The electronic device of claim 10 , further comprising an analog to digital converter (ADC) having inputs coupled to outputs of the differential operational amplifier.

15 . The electronic device of claim 14 , further comprising a chopper circuit coupled between the first and second outputs of the differential operational amplifier and the inputs of the ADC.

16 . The electronic device of claim 14 , further comprising a processing circuit configured to process digital samples produced by the ADC.

17 . The electronic device of claim 16 , wherein the processing circuit is configured to operate as moving-average filter that receives digital samples produced by the ADC and produces an output signal at a sampling frequency of the ADC, wherein each sample of the output signal represents an average of a given number of prior digital samples produced by the ADC.

18 . An electronic device, comprising:
a sensor having a first current input terminal coupled to a first node to receive a first bias current, a second current input terminal coupled to a second node to receive a second bias current, and a current output terminal coupled to a third node; a tail transistor having a first conduction terminal coupled to the third node, a second conduction terminal coupled to a reference voltage, and a control terminal; a control circuit configured to generate a control signal applied to the control terminal of the tail transistor based upon voltages at the first and second nodes; and a differential current integrator comprising a first input terminal coupled to the second node and a second input terminal coupled to the first node.

19 . The electronic device of claim 18 , wherein the sensor comprises:
a first transistor having a drain coupled to the first node, a source coupled to the third node, and a gate; and a second transistor having a drain coupled to the second node, a source coupled to the third node, and a gate coupled to the gate of the first transistor.

20 . The electronic device of claim 19 , wherein the first and second transistors are configured to operate in a subthreshold region.

21 . The electronic device of claim 20 , wherein the first and second transistors are sized with a width

Assignees

• St Microelectronics Srl

Inventors

• Ippolito Calogero Marco
• Vaiana Michele
• Recchia Angelo

Classifications

• H03F1/30 Primary

  Modifications of amplifiers to reduce influence of variations of temperature or supply voltage {or other physical parameters (in differential amplifiers H03F3/45479)} · CPC title

• H03F3/45753

  using switching means, e.g. sample and hold · CPC title

• G06G7/186

  using an operational amplifier comprising a capacitor or a resistor in the feedback loop · CPC title

• H03F3/4565

  Controlling the common source circuit of the differential amplifier · CPC title

• H03F3/45183 Primary

  Long tailed pairs (H03F3/4521, H03F3/45237 take precedence) · CPC title