Method of fabricating a substrate, substrate, electronic apparatus, display apparatus, adn touch panel

Patent metadata

Field	Value
Publication number	US-2021333965-A1
Application number	US-201816330729-A
Country	US
Kind code	A1
Filing date	Jun 5, 2018
Priority date	Jan 2, 2018
Publication date	Oct 28, 2021
Grant date	—

Abstract

The present application provides a method of fabricating a substrate. The method includes forming an insulating material layer on a base substrate; forming a plurality of channels extending into the insulating material layer; and forming a plurality of signal lines respectively in the plurality of channels. Each individual one of the plurality of signal lines is formed on a lateral side of a respective one of the plurality of channels.

First claim

1 . A method of fabricating a substrate, comprising:
forming an insulating material layer on a base substrate; forming a plurality of channels extending into the insulating material layer; and forming a plurality of signal lines respectively in the plurality of channels, each individual one of the plurality of signal lines being formed on a lateral side of a respective one of the plurality of channels.

2 . The method of claim 1 , wherein each of the plurality of signal lines is formed to have a width substantially along a direction substantially parallel to a main surface of the base substrate in a range of approximately 100 nm to approximately 800 nm.

3 . The method of claim 1 , wherein each of the plurality of signal lines is formed to have a depth substantially along a direction substantially perpendicular to a main surface of the base substrate in a range of approximately 4 μm to approximately 15 μm.

4 . The method of claim 1 , wherein the plurality of signal lines are formed to have a pitch in a range of approximately 3 μm to approximately 11 μm.

5 . The method of claim 1 , wherein each of the plurality of signal lines is formed to have a width substantially along a direction substantially parallel to a main surface of the base substrate and a depth substantially along a direction substantially perpendicular to a main surface of the base substrate; and
an aspect ratio between the depth and the width is greater than 5:1.

6 . The method of claim 1 , wherein forming the plurality of signal lines respectively in the plurality of channels comprises sputtering a conductive material onto the lateral side of the respective one of the plurality of channels;
wherein sputtering the conductive material is performed along a sputtering direction inclined with respect to a plane substantially parallel to a main surface of the base substrate.

7 . The method of claim 6 , wherein an inclined angle between the sputtering direction and the plane substantially parallel to the main surface of the base substrate is in a range of approximately 30 degrees to approximately 60 degrees.

8 . The method of claim 1 , subsequent to forming the plurality of signal lines respectively in the plurality of channels, further comprising:
filling the plurality of channels using an insulating material thereby forming an insulating layer; and removing a portion of the plurality of signal lines protruding outwardly along a direction away from the base substrate thereby substantially leveling an exposed surface of the plurality of signal lines and an exposed surface of insulating layer.

9 . The method of claim 8 , wherein removing the portion of the plurality of signal lines comprises etching the portion of the plurality of signal lines with an acidic etchant.

10 . The method of claim 8 , subsequent to filling the plurality of channels, further comprising:
forming a plurality of recesses in the insulating layer, each individual one of the plurality of recesses being formed to abut a respective one of the plurality of signal lines, thereby exposing a lateral surface of the respective one of the plurality of signal lines; and forming a plurality of conductive connectors respectively in the plurality of recesses, each individual one of the plurality of conductive connectors is electrically connected to the respective one of the plurality of signal lines.

11 . The method of claim 10 , subsequent to forming the plurality of conductive connectors, further comprising:
forming a plurality of connecting signal lines on a side of the insulating layer distal to the base substrate, each individual one of the plurality of connecting signal lines being electrically connected to a respective one of the plurality of conductive connectors.

12 . The method of claim 1 , wherein each of the plurality of channels is formed to have a width substantially along a direction substantially parallel to a main surface of the base substrate and a depth substantially along a direction substantially perpendicular to a main surface of the base substrate;
the width is in a range of approximately 1 μm to approximately 6 μm; and the depth is in a range of approximately 4 μm to approximately 15 μm.

13 . A substrate, comprising:
a base substrate; an insulating layer on the base substrate; and a plurality of signal lines at least partially embedded in the insulating layer; wherein each of the plurality of signal lines has a width substantially along a direction substantially parallel to a main surface of the base substrate in a range of approximately 100 nm to approximately 800 nm.

14 . The substrate of claim 13 , wherein each of the plurality of signal lines has a depth substantially along a direction substantially perpendicular to a main surface of the base substrate in a range of approximately 4 μm to approximately 15 μm.

15 . The substrate of claim 13 , wherein each of the plurality of signal lines has a width substantially along a direction substantially parallel to a main surface of the base substrate and a depth substantially along a direction substantially perpendicular to a main surface of the base substrate; and
an aspect ratio between the depth and the width is greater than 5:1.

16 . The substrate of claim 13 , wherein the plurality of signal lines have a pitch in a range of approximately 3 μm to approximately 11 μm.

17 . The substrate of claim 13 , further comprising a plurality of conductive connectors at least partially embedded in the insulating layer, each individual one of the plurality of conductive connectors is electrically connected to a respective one of the plurality of signal lines.

18 . The substrate of claim 17 , further comprising a plurality of connecting signal lines on a side of the insulating layer distal to the base substrate, each individual one of the plurality of connecting signal lines being electrically connected to a respective one of the plurality of conductive connectors.

19 . An electronic apparatus, comprising the substrate of any one of claim 13 .

20 . A display apparatus, comprising the substrate of claim 13 .

Assignees

• Hefei Xinsheng Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• He Xiaoyue
• Xie Taofeng
• Fan Wenjin

Classifications

• G06F2203/04103

  Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices · CPC title

• G06F3/0443

  using a single layer of sensing electrodes · CPC title

• G06F3/04164 Primary

  Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads · CPC title

• G06F3/0412

  Digitisers structurally integrated in a display · CPC title

• G06F3/041 Primary

  Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means · CPC title