Process control system with different hardware architecture controller backup

US2021302927A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2021302927-A1
Application numberUS-202016836556-A
CountryUS
Kind codeA1
Filing dateMar 31, 2020
Priority dateMar 31, 2020
Publication dateSep 30, 2021
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A process control system includes first type and second type controllers having different hardware architectures coupled together by a redundancy network for providing a controller pool. Primary application modules (AMs) are coupled to the controller platforms by a plant-wide network. The controller platforms are coupled by an input/output (I/O) mesh network to I/O devices to provide an I/O pool coupled to field devices coupled to processing equipment. A translating device translates states and values from one of the primary AMs running on a first type controller to generate a backup AM having an instruction set compatible with the second type controller. A controller application module orchestrator (CAMO) extends synchronization to the second type controller, makes the backup AM available to the second type controller, and then switches to utilize the second type controller as an active controller running the process.

First claim

Opening claim text (preview).

1 . A method, comprising: providing a process control system configured for running a process comprising a plurality of controller platforms including first type controllers having a first hardware architecture and at least one second type controller having a second hardware architecture different from the first type controllers coupled to one another by a redundancy network for providing a controller pool, and primary application modules (AMs) coupled to the plurality controller platforms by a plant-wide network, wherein the plurality of controller platforms are coupled by an input/output (I/O) mesh network to I/O devices to provide an I/O pool coupled to field devices coupled to processing equipment, the method comprising: transferring states and values from at least one of the primary AMs running on one of the first type controllers to a memory accessible by the second type controller to store a backup AM; extending synchronization to the second type controller, and switching to utilize the second type controller by deploying the backup AM as an active controller while continuing to run the process. 2 . The method of claim 1 , further comprising translating the states and the values from the at least one of the primary AMs into a hardware architecture independent format information, and wherein the transferring comprises sending the hardware architecture independent format information to the memory accessible by the second type controller, and before the switching the method further comprising the second type controller translating the hardware architecture independent data format information into an instruction set that is compatible with the second hardware architecture. 3 . The method of claim 1 , wherein the second type controller further comprises an emulation layer for emulating the first hardware architecture by performing a translation so that the state and data information from the primary AM received in the memory accessible by the second type controller remains in a data format compatible with the first type controller. 4 . The method of claim 1 , wherein the first hardware architecture comprises a PowerQUICC or an ARM architecture, and wherein the second hardware architecture comprises an X86 operating system (OS) architecture. 5 . The method of claim 1 , wherein at a first time the process is being exclusively controlled by the first type controllers, further comprising at a second time after the first time determining a data processing or memory insufficiency in the first type controllers, and then implementing the switching. 6 . The method of claim 5 , further comprising repairing or replacing at least one of the first type controllers to overcome the data processing or the memory insufficiency, restoring all controller functions the first type controllers, then idling the second type controller to transfer an entire controller workload back to the first type controllers. 7 . The method of claim 1 , wherein the plurality of controller platforms include at least one redundant controller arrangement. 8 . The method of claim 1 , wherein the switching is performed at least partially automatically. 9 . The method of claim 1 , wherein a controller application module orchestrator (CAMO) coupled to the plant-wide network implements at least the extending synchronization and the switching. 10 . A process control system for running a process, comprising: a plurality of controller platforms including first type controllers having a first hardware architecture and at least one second type controller having a different second hardware architecture coupled to one another by a redundancy network for providing a controller pool; primary application modules (AMs) coupled to the plurality controller platforms by a plant-wide network, wherein the plurality of controller platforms are coupled by an input/output (I/O) mesh network to I/O devices to provide an I/O pool coupled to field devices coupled to processing equipment; a translating device for translating states and values received from at least one of the AMs running on one of the first type controllers to generate a backup AM that has an instruction set compatible with the second type controller; a controller application module orchestrator (CAMO) coupled to the plant-wide network for implementing: extending synchronization to the second type controller; transferring the backup AM to a memory of the second type controller, and after the translating, switching to utilize the second type controller that deploys the backup AM as an active controller while continuing to run the process. 11 . The process control system of claim 10 , wherein the first hardware architecture comprises PowerQUICC or an ARM architecture, and wherein the second hardware architecture comprises an X86 operating system (OS) architecture. 12 . The process control system of claim 10 , wherein at a first time the process is being exclusively controlled by the primary AMs, further comprising one of the first type controllers or the second type controller at a second time after the first time for determining a data processing or memory insufficiency in the first type controllers, and then implementing the switching. 13 . The process control system of claim 10 , wherein the plurality of controller platforms include at least one redundant controller arrangement. 14 . The process control system of claim 10 , wherein the switching is performed at least partially automatically. 15 . The process control system of claim 10 , further comprising a controller application module orchestrator (CAMO) coupled to the plant-wide network for implementing at least the extending synchronization and the switching.

Assignees

Inventors

Classifications

  • characterised by fault tolerance, reliability of production system · CPC title

  • Network communication between supervisor and cell, machine group · CPC title

  • eliminating a faulty processor or activating a spare · CPC title

  • using centralised failover control functionality · CPC title

  • Involving translation to a different instruction set architecture, e.g. just-in-time translation in a JVM · CPC title

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What does patent US2021302927A1 cover?
A process control system includes first type and second type controllers having different hardware architectures coupled together by a redundancy network for providing a controller pool. Primary application modules (AMs) are coupled to the controller platforms by a plant-wide network. The controller platforms are coupled by an input/output (I/O) mesh network to I/O devices to provide an I/O poo…
Who is the assignee on this patent?
Honeywell Int Inc
What technology area does this patent fall under?
Primary CPC classification G05B19/4184. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Sep 30 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).