Display panel and method for driving the same, and display device

Patent metadata

Field	Value
Publication number	US-2021287614-A1
Application number	US-202117332222-A
Country	US
Kind code	A1
Filing date	May 27, 2021
Priority date	Mar 1, 2021
Publication date	Sep 16, 2021
Grant date	—

Abstract

A display panel and a method for driving the same, and a display device are provided. The display panel includes a light emitting element and a pixel circuit that includes a data writing module configured to provide a data signal and an adjusting voltage, a driving module configured to provide a driving current to the light emitting element and including a driving transistor, and a compensation module configured to compensate a threshold voltage of the driving transistor. An operation process of the display panel includes a period of a data writing frame during which the pixel circuit executes a data writing phase during which the data writing module writes the data signal and a light emitting phase, and a period of a holding frame during which the pixel circuit executes a reset and adjustment phase during which the data writing module writes the adjusting voltage and the light emitting phase.

First claim

What is claimed is:

1 . A display panel, comprising:
a pixel circuit comprising a data writing module, a driving module and a compensation module; and a light emitting element, wherein the data writing module is configured to provide a data signal and an adjusting voltage, the driving module is configured to provide a driving current to the light emitting element and comprises a driving transistor, and the compensation module is configured to compensate a threshold voltage of the driving transistor; wherein an operation process of the display panel comprises a period of a data writing frame and a period of a holding frame; wherein in the period of the data writing frame, the pixel circuit executes a data writing phase and a light emitting phase, wherein during the data writing phase, the data writing module and the compensation module are turned on, the data writing module writes the data signal; and wherein in the period of the holding frame, the pixel circuit executes a reset and adjustment phase and the light emitting phase, wherein during the reset and adjustment phase, the data writing module is turned on, the compensation module is turned off, and the data writing module writes the adjusting voltage for adjusting a bias state of the driving transistor.

2 . The display panel according to claim 1 , wherein the data writing module is connected to a source of the driving transistor, and the compensation module is connected between a gate of the driving transistor and a drain of the driving transistor.

3 . The display panel according to claim 2 , wherein the data writing module comprises a first transistor, and the first transistor comprises a first terminal connected to a data signal input terminal, a second terminal connected to the source of the driving transistor, and a gate connected to a first control signal terminal;
during the data writing phase, under control of a signal of the first control signal terminal, the first transistor writes the data signal to the source of the driving transistor; and during the reset and adjustment phase, under control of the signal of the first control signal terminal, the first transistor writes the adjusting voltage to the source of the driving transistor.

4 . The display panel according to claim 3 , wherein the pixel circuit further comprises:
an anode reset transistor configured to provide a reset signal to an anode of the light emitting element, wherein the anode reset transistor comprises a first terminal electrically connected to a reset voltage input terminal, a second terminal electrically connected to the anode of the light emitting element, and a gate electrically connected to the first control signal terminal.

5 . The display panel according to claim 1 , wherein the pixel circuit further comprises a light-emission controlling module configured to control the light emitting element to enter the light emitting phase;
the light-emission controlling module comprises a first light-emission controlling module and a second light-emission controlling module, wherein the first light-emission controlling module is connected between a first power supply terminal and a source of the driving transistor, and the second light-emission controlling module is connected between a drain of the driving transistor and the light emitting element; and during the reset and adjustment phase, at least the first light-emission controlling module is turned off.

6 . The display panel according to claim 1 , wherein the pixel circuit further comprises a reset module configured to provide a reset signal to a gate of the driving transistor;
the period of the data writing frame further comprises a reset phase prior to the data writing phase, and the reset module is turned on during the reset phase; and in the period of the holding frame, the reset module is turned off.

7 . The display panel according to claim 6 , wherein during the reset phase, a voltage of the gate of the driving transistor is Vg1, and a voltage of a source of the driving transistor is Vs1; and
during the reset and adjustment phase, the voltage of the gate of the driving transistor is Vg2, and the voltage of the source of the driving transistor is Vs2, where −3V≤Vg1−Vs1−(Vg2−Vs2)≤3V.

8 . The display panel according to claim 1 , wherein the adjusting voltage is VJ, and at an initial moment of the reset and adjustment phase, a voltage of a source of the driving transistor is Vs1, where VJ>Vs1.

9 . The display panel according to claim 1 , wherein during the reset and adjustment phase, a voltage of a gate of the driving transistor is Vg2, and a voltage of a source of the driving transistor is Vs2, where Vg2−Vs2≤−2V.

10 . The display panel according to claim 1 , wherein the adjusting voltage is VJ, and a maximum value of a voltage of a preset data signal is VD, where VJ≥VD.

11 . The display panel according to claim 1 , wherein the pixel circuit further comprises a light-emission controlling module configured to control the light emitting element to enter the light emitting phase;
the light-emission controlling module comprises a first light-emission controlling module and a second light-emission controlling module, wherein the first light-emission controlling module is connected between a first power supply terminal and a source of the driving transistor, and the second light-emission controlling module is connected between a drain of the driving transistor and the light emitting element; and a power supply voltage provided by the first power supply terminal is VP, and the adjusting voltage is VJ, where VJ≥VP.

12 . The display panel according to claim 1 , wherein the pixel circuit further comprises a reset module configured to provide a reset signal to a gate of the driving transistor, a voltage of the reset signal is VR, and the adjusting voltage is VJ, where VJ≥VR.

13 . The display panel according to claim 1 , wherein the adjusting voltage is a constant voltage.

14 . The display panel according to claim 1 , further comprising a driving circuit and data lines, wherein the driving circuit is connected to the data writing module via the data lines;
during the data writing phase, the driving circuit supplies the data signal to the data writing module via one of the data lines; and during the reset and adjustment phase, the driving circuit supplies the adjusting voltage to the data writing module via the data line.

15 . The display panel according to claim 1 , wherein an operation mode of the display panel comprises a first mode, the first mode comprises repeated first cycles, and each of the first cycles comprises one period of a data writing frame and at least one period of a holding frame, wherein the one period of the data writing frame is the period of the data writing frame, and each of the at least one period of the holding frame is the period of the holding frame.

16 . The display panel according to claim 15 , wherein the operation mode of the display panel further comprises a second mode, the second mode comprises repeated periods of data writing frame, and each of the repeated periods of data writing frame is the period of the data writing frame; and
an image refreshing rate of the display panel in the second mode is greater than an image refreshing rate of the display panel in the first mode.

17 . The display panel according to claim 1 , wherein the driving transistor is a P-type transistor.

18 . A method for driving a display panel, wherein the display panel comprises a pixel circuit and a light emitting element, th

Assignees

• Shanghai Tianma Micro Elect Co

Inventors

• XIONG Nana
• Fu Jujian

Classifications

• G09G2310/0251

  Precharge or discharge of pixel before applying new pixel voltage · CPC title

• G09G2310/0262

  The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title