Techniques for retiring blocks of a memory system
US-2024363185-A1 · Oct 31, 2024 · US
US2021286662A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2021286662-A1 |
| Application number | US-202117170041-A |
| Country | US |
| Kind code | A1 |
| Filing date | Feb 8, 2021 |
| Priority date | Mar 13, 2020 |
| Publication date | Sep 16, 2021 |
| Grant date | — |
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An error rate measuring apparatus includes an operation unit that sets one Codeword length and one FEC Symbol length of FEC according to a communication standard of a device under test, data division means for dividing symbol string data obtained by converting a signal received from the device under test into MSB data and LSB data, a data comparison unit that compares each of the divided MSB data and LSB data with error data to detect MSB errors and LSB errors of each one Codeword length, and detects FEC Symbol Errors of each of the MSB data and the LSB data at one FEC Symbol interval, and error counting means for counting the detected MSB errors and LSB errors, and counting the FEC Symbol Errors.
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What is claimed is: 1 . An error rate measuring apparatus that inputs a non return to zero (NRZ) signal of a known pattern as a test signal to a device under test W, receives a signal from the device under test compliant with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the signal received from the device under test and the test signal, the error rate measuring apparatus comprising: an operation unit that sets one Codeword length and one FEC Symbol length of the FEC according to a communication standard of the device under test; a data comparison unit that compares bit string data obtained by converting the signal received from the device under test with predetermined error data to detect errors of each one Codeword length, and detects FEC Symbol Errors of the bit string data at one FEC Symbol interval; and error counting means for counting the number of errors and the number of FEC Symbol Errors of each one Codeword length detected by the data comparison unit. 2 . An error rate measuring apparatus comprising: an operation unit that sets one Codeword length and one FEC Symbol length of the FEC according to a communication standard of the device under test; data division means for dividing symbol string data obtained by converting the signal received from the device under test into most significant bit (MSB) string data and least significant bit (LSB) string data; a data comparison unit that compares each of the most significant bit string data and the least significant bit string data divided by the data division means with predetermined error data to detect most significant bit errors and least significant bit errors of each one Codeword length and detects FEC Symbol Errors of each of the most significant bit string data and the least significant bit string data at the one FEC Symbol interval; and error counting means for counting the number of most significant bit errors and the number of least significant bit errors, and the number of FEC Symbol Errors detected by the data comparison unit. 3 . The error rate measuring apparatus according to claim 1 , further comprising: a display unit that displays an error rate and an error count value based on a result of the counting. 4 . The error rate measuring apparatus according to claim 2 , further comprising: a display unit that displays an error rate and an error count value based on a result of the counting. 5 . An error counting method for an error rate measuring apparatus that inputs a non return to zero (NRZ) signal of a known pattern as a test signal to a device under test W, receives a signal from the device under test compliant with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the signal received from the device under test and the test signal, the error counting method comprising: a step of setting one Codeword length and one FEC Symbol length of the FEC according to a communication standard of the device under test; a step of comparing bit string data obtained by converting the signal received from the device under test with predetermined error data to detect errors of each one Codeword length, and detecting FEC Symbol Errors of the bit string data at one FEC Symbol interval; and a step of counting the number of detected errors and the number of detected FEC Symbol Errors of each one Codeword length. 6 . An error counting method for an error rate measuring apparatus that inputs a pulse amplitude modulation 4 (PAM4) signal of a known pattern as a test signal to a device under test W, receives a signal from the device under test compliant with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the signal received from the device under test and the test signal, the error counting method comprising: a step of setting one Codeword length and one FEC Symbol length of the FEC according to a communication standard of the device under test; a step of dividing symbol string data obtained by converting the signal received from the device under test into most significant bit (MSB) string data and least significant bit (LSB) string data; a step of comparing each of the divided most significant bit string data and least significant bit string data with predetermined error data to detect most significant bit errors and least significant bit errors of each one Codeword length, and detecting FEC Symbol Errors of each of the most significant bit string data and the least significant bit string data at one FEC Symbol interval; and a step of counting the number of detected most significant bit errors and the number of detected least significant bit errors, and the number of detected FEC Symbol Errors. 7 . The error counting method for an error rate measuring apparatus according to claim 5 , further comprising: a step of displaying an error rate and an error count value based on a result of the counting. 8 . The error counting method for an error rate measuring apparatus according to claim 6 , further comprising: a step of displaying an error rate and an error count value based on a result of the counting.
using arrangements adapted for a specific error detection or correction feature · CPC title
by exceeding a count or rate limit, e.g. word- or bit count limit · CPC title
Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers · CPC title
for error or online/offline status · CPC title
Generation of test inputs, e.g. test vectors, patterns or sequences {; with adaptation of the tested hardware for testability with external testers} · CPC title
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