Methods and systems for processing data in a programmable data processing pipeline that includes out-of-pipeline processing

Patent metadata

Field	Value
Publication number	US-2021263744-A1
Application number	US-202016797854-A
Country	US
Kind code	A1
Filing date	Feb 21, 2020
Priority date	Feb 21, 2020
Publication date	Aug 26, 2021
Grant date	—

Abstract

Methods and system for processing data in a programmable processing pipeline are disclosed. In an embodiment, a method for processing packets in a programmable packet processing pipeline is disclosed. The method involves processing data corresponding to a packet through a match-action pipeline of a programmable packet processing pipeline, and diverting the processing of data corresponding to the packet from the match-action pipeline to a processor core for out-of-pipeline processing.

First claim

What is claimed is:

1 . A method for processing packets in a programmable packet processing pipeline, the method comprising:
processing data corresponding to a packet through a match-action pipeline of a programmable packet processing pipeline; and diverting the processing of data corresponding to the packet from the match-action pipeline to a processor core for out-of-pipeline processing.

2 . The method of claim 1 , further comprising returning a result of the out-of-pipeline processing back to the match-action pipeline for further processing.

3 . The method of claim 2 , wherein returning a result of the out-of-pipeline processing back to the match-action pipeline comprises queuing the result for use by a next stage of the match-action pipeline.

4 . The method of claim 1 , wherein diverting the processing of data corresponding to the packet from the match-action pipeline to a processor core comprises reading a field in a packet header vector that is processed in the match-action pipeline and diverting the processing of data corresponding to the packet in response to reading the field in the packet header vector.

5 . The method of claim 4 , wherein diverting the processing of data corresponding to the packet from the match-action pipeline to a processor core comprises queuing at least a portion of the packet header vector for use by the processor core.

6 . The method of claim 1 , wherein diverting the processing of data corresponding to the packet from the match-action pipeline to a processor core comprises providing a packet header vector to the processor core via direct memory access (DMA).

7 . The method of claim 1 , further comprising parsing header information corresponding to the packet to generate a packet header vector and providing the packet header vector to the match-action pipeline.

8 . The method of claim 1 , wherein processing data through a match-action pipeline comprises processing a packet header vector that is generated from header information of the packet.

9 . The method of claim 1 , wherein the programmable packet processing pipeline is programmable according to the P4 language specification as provided by the P4 Language Consortium.

10 . The method of claim 1 , further comprising programming the programmable packet processing pipeline according to the P4 language specification as provided by the P4 Language Consortium.

11 . The method of claim 1 , further comprising diverting the processing of data corresponding to multiple packets from a flow of packets to maintain packet ordering of the flow of packets.

12 . The method of claim 11 , wherein the multiple packets from the flow of packets are diverted to the same processor core for out-of-pipeline processing.

13 . The method of claim 11 , wherein a flow of packets is packets that have common header values.

14 . The method of claim 11 , wherein a flow of packets consists of packets that have the same source IP address, source port number, destination IP address, destination port number, and protocol.

15 . A system for processing packets, the system comprising:
a programmable packet processing pipeline that includes a match-action pipeline; multiple processor cores; a pipeline-processor interface that connects the programmable packet processing pipeline to the multiple processor cores; and diversion logic configured to divert the processing of data corresponding to a packet from the match-action pipeline to at least one processor core of the multiple processor cores via the pipeline-processor interface for out-of-pipeline processing.

16 . The system of claim 15 , wherein the pipeline-processor interface is configured to return a result of the out-of-pipeline processing back to the match-action pipeline for further processing.

17 . The system of claim 15 , wherein the pipeline-processor interface includes memory configured to queue data corresponding to the packet as the processing transitions between the programmable packet processing pipeline and the processor cores.

18 . The system of claim 15 , wherein the diversion logic is configured to read a value of a packet header vector and to divert the processing from the match-action pipeline to at least one processor core of the multiple processor cores in response to the read value.

19 . The system of claim 15 , wherein the diversion logic comprises programmable decision logic and select logic, wherein the programmable decision logic is configured to read a value of a packet header vector and to control the select logic to select between available options of a match-action unit of the programmable packet processing pipeline and at least one processor core of the multiple processor cores.

20 . The system of claim 15 , wherein the programmable packet processing pipeline includes a programmable parser and a programmable deparser, and wherein the match-action pipeline includes a series of programmable match-action units located in a process flow between the programmable parser and the programmable deparser.

21 . The system of claim 15 , wherein the match-action pipeline includes a series of match-action units and wherein the match-action units of the match-action pipeline include a match unit having key construction logic and a match table.

22 . The system of claim 15 , wherein the programmable packet processing pipeline is programmable according to the P4 language specification as provided by the P4 Language Consortium.

23 . A method for processing data in a programmable data processing pipeline, the method comprising:
processing data corresponding to a data set through a match-action pipeline of a programmable processing pipeline; and diverting the processing of data corresponding to the data set from the match-action pipeline to a processor core for out-of-pipeline processing.

24 . The method of claim 23 , further comprising returning a result of the out-of-pipeline processing back to the match-action pipeline for further processing.

Assignees

• Pensando Systems Inc

Inventors

• Crupnicoff Diego
• Galles Michael B

Classifications

• G06F9/30038

  using a mask · CPC title

• G06F9/30036

  Instructions to perform operations on packed data, e.g. vector, tile or matrix operations · CPC title

• H04L12/4641

  Virtual LANs, VLANs, e.g. virtual private networks [VPN] (LAN interconnection over a bridge based backbone H04L12/462; encapsulation techniques H04L12/4633; routing of packets H04L45/00; packet switches H04L49/00; virtual private networks for security H04L63/0272) · CPC title

• H04L12/4633 Primary

  Interconnection of networks using encapsulation techniques, e.g. tunneling · CPC title

• G06F9/382

  Pipelined decoding, e.g. using predecoding · CPC title