Microcode update system

Patent metadata

Field	Value
Publication number	US-2021240468-A1
Application number	US-202016778064-A
Country	US
Kind code	A1
Filing date	Jan 31, 2020
Priority date	Jan 31, 2020
Publication date	Aug 5, 2021
Grant date	—

Abstract

A microcode update system includes at least one memory device having a code region and a data region, and a microcode update engine that receives a microcode update, and writes the microcode update to the data region of the at least one memory device. Subsequent to writing the microcode update to the data region of the at least one memory device, the microcode update engine utilizes initialization code in the code region of the at least one memory device to perform initialization operations. During a microcode update portion of the initialization operations, the microcode update engine identifies the microcode update in the data region of the at least one memory device, and performs microcode update operations using the microcode update in the data region of the at least one memory device.

First claim

1 . A microcode update system, comprising:
at least one memory device including a code region and a data region; and a microcode update engine that is coupled to the at least one memory device and that is configured to:
receive a microcode update;
write the microcode update to the data region of the at least one memory device;
perform, subsequent to writing the microcode update to the data region of the at least one memory device utilizing initialization code in the code region of the at least one memory device, and utilizing existing microcode that is to be updated with the microcode update, initialization operations, wherein the microcode update is provided without an initialization code update for the initialization code;
identify, during a microcode update portion of the initialization operations, the microcode update in the data region of the at least one memory device; and
perform microcode update operations using the microcode update in the data region of the at least one memory device.

2 . The system of claim 1 , wherein the microcode update engine is configured to:
write the microcode update to a Unified Extensible Firmware Interface (UEFI) variable in the data region of the at least one memory device.

3 . The system of claim 1 , wherein the microcode update engine is configured to:
determine, in response to identifying the microcode update in the data region of the at least one memory device, whether the microcode update should be applied in place of existing microcode included in the initialization code; and perform, in response to determining that the microcode update should be applied in place of the existing microcode included in the initialization code, using the microcode update in the data region of the at least one memory device.

4 . The system of claim 1 , wherein the microcode update engine is configured to:
validate, prior to performing the microcode update operations using the microcode update in the data region of the at least one memory device, the microcode update.

5 . The system of claim 4 , wherein the microcode update engine is configured to:
erase, in response a failure in validating the microcode update, the microcode update from the data region of the at least one memory device.

6 . The system of claim 1 , wherein the initialization operations include copying the initialization code to a main memory system, and wherein the microcode update operations include copying the microcode update to the main memory system.

7 . An Information Handling System (IHS), comprising:
a processing system that includes at least one hardware processor that is configured to execute instructions that cause the processing system to provide a microcode update engine that is configured to:
receive a microcode update;
write the microcode update to a data region of at least one memory device;
perform, subsequent to writing the microcode update to the data region of the at least one memory device utilizing initialization code in a code region of the at least one memory device, and utilizing existing microcode that is to be updated with the microcode update, initialization operations, wherein the microcode update is provided without an initialization code update for the initialization code;
identify, during a microcode update portion of the initialization operations, the microcode update in the data region of the at least one memory device; and perform microcode update operations using the microcode update in the data region of the at least one memory device.

8 . The IHS of claim 7 , wherein the microcode update engine is configured to:
write the microcode update to a Unified Extensible Firmware Interface (UEFI) variable in the data region of the at least one memory device.

9 . The IHS of claim 7 , wherein the microcode update engine is configured to:
determine, in response to identifying the microcode update in the data region of the at least one memory device, whether the microcode update should be applied in place of existing microcode included in the initialization code; and perform, in response to determining that the microcode update should be applied in place of the existing microcode included in the initialization code, any of a subset of the initialization operations that have not yet been performed using the microcode update in the data region of the at least one memory device.

10 . The IHS of claim 9 , wherein the microcode update engine is configured to:
perform, in response to determining that the microcode update should not be applied in place of the existing microcode included in the initialization code, the microcode update operations using the existing microcode included in the initialization code.

11 . The IHS of claim 7 , wherein the microcode update engine is configured to:
validate, prior to performing the microcode update operations using the microcode update in the data region of the at least one memory device, the microcode update.

12 . The IHS of claim 11 , wherein the microcode update engine is configured to:
erase, in response a failure in validating the microcode update, the microcode update from the data region of the at least one memory device.

13 . The IHS of claim 7 , wherein the initialization operations include copying the initialization code to a main memory system, and wherein the microcode update operations include copying the microcode update to the main memory system.

14 . A method for updating microcode, comprising:
receiving, by a microcode update engine provided via operation of a processing system in a computing device, a microcode update; writing, by the microcode update engine, the microcode update to a data region of at least one memory device; performing, by the microcode update engine subsequent to writing the microcode update to the data region of the at least one memory device, utilizing initialization code in a code region of the at least one memory device, and utilizing existing microcode that is to be updated with the microcode update, initialization operations, wherein the microcode update is provided without an initialization code update for the initialization code; identifying, by the microcode update engine during a microcode update portion of the initialization operations, the microcode update in the data region of the at least one memory device; and performing, by the microcode update engine, microcode update operations using the microcode update in the data region of the at least one memory device.

15 . The method of claim 14 , further comprising:
writing, by the microcode update engine, the microcode update to a Unified Extensible Firmware Interface (UEFI) variable in the data region of the at least one memory device.

16 . The method of claim 14 , further comprising:
determining, by the microcode update engine in response to identifying the microcode update in the data region of the at least one memory device, whether the microcode update should be applied in place of existing microcode included in the initialization code; and performing, by the microcode update engine in response to determining that the microcode update should be applied in place of the existing microcode included in the initialization code, the microcode update operations using the microcode update in the data region of the at least one memory device.

17 . The method of claim 16 , further comprising:
performing, by the microcode update engine in response to determining that the microcode update should not be applied in place of the existing microcode included in the initialization

Assignees

• Dell Products Lp

Inventors

• Shanmugam Murali Manohar
• Liu Wei
• Diaz Juan Francisco

Classifications

• G06F8/654

  using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories · CPC title

• G06F8/66 Primary

  of program code stored in read-only memory [ROM] · CPC title

• G06F9/4401

  Bootstrapping (security arrangements therefor G06F21/57) · CPC title

• G06F8/658 Primary

  Incremental updates; Differential updates · CPC title