Thin Film Transistor and Fabrication Method Thereof, Array Substrate and Display Device

Patent metadata

Field	Value
Publication number	US-2021210621-A1
Application number	US-201716067366-A
Country	US
Kind code	A1
Filing date	Nov 29, 2017
Priority date	May 4, 2017
Publication date	Jul 8, 2021
Grant date	—

Abstract

A fabrication method of a thin film transistor is provided. The fabrication method includes: forming a gate electrode, an active layer, a drain electrode and a source electrode on the base substrate, in which the active layer includes a channel region and a second portion on both sides of the channel region, and at least a portion of the channel region is overlapped with the gate electrode; and performing a laser annealing process on a side of the base substrate by using a laser, in which the channel region is shielded without being irradiated by the laser, a resistivity of the second portion of the active layer is lower than a resistivity of the channel region, and the second portion of the active layer is connected with the source electrode and the drain electrode. A thin film transistor, an array substrate and a display device are further provided.

First claim

1 . A fabrication method of a thin film transistor, comprising:
providing a base substrate; forming a gate electrode, an active layer, a source electrode and a drain electrode on the base substrate, wherein the active layer comprises a channel region and a second portion on both sides of the channel region, and at least a portion of the channel region is overlapped with the gate electrode; and performing a laser annealing process on a side of the base substrate by using a laser, wherein the channel region is shielded and not irradiated by the laser, and a resistivity of the second portion of the active layer is lower than a resistivity of the channel region because of the laser annealing process; wherein the second portion of the active layer is connected with the source electrode and the drain electrode.

2 . The fabrication method of the thin film transistor according to claim 1 , wherein the thin film transistor is a bottom-gate type thin film transistor, and the laser annealing process is performed on a side of the base substrate which is not provided with the active layer by using the gate electrode as a mask.

3 . The fabrication method of the thin film transistor according to claim 1 , wherein the thin film transistor is a bottom-gate type thin film transistor; and the fabrication method further comprises: forming a shielding layer that is overlapped with at least a portion of the channel region on a side of the active layer facing away from the base substrate; and performing the laser annealing process on a side of the base substrate provided with the active layer by using the shielding layer as a mask.

4 . The fabrication method of the thin film transistor according to claim 1 , wherein the thin film transistor is a top-gate type thin film transistor, and the laser annealing process is performed on a side of the base substrate provided with the active layer by using the gate electrode as a mask.

5 . The fabrication method of the thin film transistor according to claim 1 , wherein the thin film transistor is a top-gate type thin film transistor; and the fabrication method further comprises: forming a shielding layer that is overlapped with at least a portion of the channel region on a side of the active layer facing the base substrate; and performing the laser annealing process on a side of the base substrate which is not provided with the active layer by using the shielding layer as a mask.

6 . The fabrication method of the thin film transistor according to claim 1 , further comprising:
forming an etching stop layer on the active layer before forming the source electrode and the drain electrode.

7 . The fabrication method of the thin film transistor according to claim 1 , further comprising:
forming an insulating layer on the source electrode and the drain electrode, wherein the laser annealing process is performed after the insulating layer is formed on the source electrode and the drain electrode.

8 . The fabrication method of the thin film transistor according to claim 1 , wherein the laser annealing process is performed after the source electrode and the drain electrode are formed.

9 . The fabrication method of the thin film transistor according to claim 1 , wherein the laser annealing process is performed after the active layer is formed and before the source electrode and the drain electrode are formed.

10 . The fabrication method of the thin film transistor according to claim 6 , wherein the laser annealing process is performed after the etching stop layer is formed and before the source electrode and the drain electrode are formed.

11 . The fabrication method of the thin film transistor according to claim 1 , wherein the laser annealing process is an excimer laser annealing process or a continuous oscillation laser annealing process.

12 . The fabrication method of the thin film transistor according to claim 1 , wherein an energy of the laser is from 100 mj/cm 2 to 300 mj/cm 2 during performing the laser annealing process.

13 . A thin film transistor, comprising:
a gate electrode, an active layer, a source electrode and a drain electrode disposed on a base substrate; wherein the active layer comprises a channel region and a second portion, at least a portion of the channel region is overlapped with the gate electrode, and the second portion is not overlapped with the gate electrode; a laser annealing process is performed on the second portion so that a resistivity of the second portion of the active layer is lower than a resistivity of the channel region; the second portion of the active layer is connected with the source electrode and the drain electrode.

14 . The thin film transistor according to claim 13 , wherein the thin film transistor is a bottom-gate type thin film transistor.

15 . The thin film transistor according to claim 14 , further comprising: a shielding layer, arranged on a side of the active layer facing away from the base substrate and overlapped with at least a portion of the channel region.

16 . The thin film transistor according to claim 13 , wherein the thin film transistor is a top-gate type thin film transistor.

17 . The thin film transistor according to claim 16 , further comprising: a shielding layer, arranged on a side of the active layer facing the base substrate and overlapped with at least a portion of the channel region.

18 . The thin film transistor according to claim 13 , further comprising an etching stop layer arranged on the active layer.

19 . An array substrate, comprising the thin film transistor according to claim 13 .

20 . A display device, comprising the array substrate according to claim 19 .

Assignees

• Boe Technology Group Co Ltd
• Hefei Xinsheng Optoelectronics Technology Co Ltd

Inventors

• Cao Binbin
• Sun Lin
• Wang Chao

Classifications

• H10P34/42

  with electromagnetic radiation, e.g. laser annealing (laser cutting H10P54/20) · CPC title

• H10D30/6723

  having light shields · CPC title

• H10D30/6713

  characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes · CPC title

• H10D30/031

  of thin-film transistors [TFT] · CPC title

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title