Storage device and operating method thereof

Patent metadata

Field	Value
Publication number	US-2021208815-A1
Application number	US-202017067698-A
Country	US
Kind code	A1
Filing date	Oct 11, 2020
Priority date	Jan 2, 2020
Publication date	Jul 8, 2021
Grant date	—

Abstract

A method of operating a storage device that includes a nonvolatile memory device and a controller that controls operation of the nonvolatile memory device includes issuing, by the controller, a first command to the nonvolatile memory device, reading, by the nonvolatile memory device, first data from a memory cell array into a page buffer of the nonvolatile memory device, in response to the first command, issuing, by the controller, a second command to the nonvolatile memory device, and outputting, by the nonvolatile memory device to the controller, in response to the second command, status information indicating whether a read operation according to the first command has been completed and second data obtained from the page buffer of the nonvolatile memory device.

First claim

What is claimed is:

1 . A method of operating a storage device that includes a nonvolatile memory device and a controller that controls operation of the nonvolatile memory device, the method comprising:
issuing, by the controller, a first command to the nonvolatile memory device; reading, by the nonvolatile memory device, first data from a memory cell array into a page buffer of the nonvolatile memory device, in response to the first command; issuing, by the controller, a second command to the nonvolatile memory device; and outputting, by the nonvolatile memory device to the controller, in response to the second command, status information indicating whether a read operation according to the first command has been completed and second data obtained from the page buffer of the nonvolatile memory device.

2 . The method of claim 1 , further comprising:
continuously receiving, by the controller, the second data from the nonvolatile memory device when the received status information indicates a ready status in which the read operation of the memory cell array has been completed; and stopping, by the controller, receiving the second data from the nonvolatile memory device when the received status information indicates a busy status in which the read operation of the memory cell array has not been completed.

3 . The method of claim 2 , further comprising reissuing, by the controller, the second command after waiting for a first time interval after stopping the receiving of the second data.

4 . The method of claim 1 , further comprising:
toggling, by the controller, a read enable signal provided to the nonvolatile memory device, after issuing the second command; and stopping, by the controller, the toggling of the read enable signal when the received status information indicates a busy status in which the read operation has not been completed, after outputting the status information and the second data.

5 . The method of claim 4 , further comprising, by the nonvolatile memory device, generating a data strobe signal synchronized with the read enable signal and outputting the second data in synchronization with a rising edge and a falling edge of the data strobe signal.

6 . The method of claim 1 , wherein outputting further comprises outputting third data during a busy status in which the read operation of the memory cell array has not been completed.

7 . The method of claim 6 , wherein the third data is at least one of a faulty memory cell address or a power status of the memory cell array.

8 . The method of claim 1 , wherein the outputting further comprises outputting the second data after outputting the status information.

9 . The method of claim 1 , wherein the controller issues the first command and the second command when the controller is set to a first read mode, and issues the first command, a third command for outputting the status information, and a fourth command for transferring the second data when the controller is set to a second road mode.

10 . A storage device comprising:
a nonvolatile memory device; and a controller that controls the nonvolatile memory device and issues a plurality of commands, wherein the nonvolatile memory device comprises:
a memory cell array that includes a plurality of memory cells and that reads first data in response to a first command;
a control logic that controls a read operation of the memory cell array based on the plurality of commands;
a page buffer that buffers the first data; and
an input/output interface that, in response to a second command, outputs to the controller status information indicating whether the read operation has been completed and second data obtained by buffering the first data.

11 . The storage device of claim 10 , wherein the nonvolatile memory device outputs the status information and the second data in synchronization with a data strobe signal, outputs the status information in synchronization with a first edge of the data strobe signal, and outputs the first data in synchronization with a second edge of the data strobe signal.

12 . The storage device of claim 10 , wherein the controller issues the second command after waiting for a first time interval after issuing the first command, and reissues the second command after waiting for a second time interval when the status information received from the nonvolatile memory device indicates a busy status in which the read operation of the memory cell array has not been completed.

13 . The storage device of claim 10 , wherein the controller outputs a read enable signal to the nonvolatile memory device, starts toggling the read enable signal after the second command is issued, and stops toggling the read enable signal when the received status information indicates a busy status in which the read operation has not been completed.

14 . The storage device of claim 10 , wherein the input/output interface outputs the second data after outputting the status information.

15 . A method of operating a storage device that includes a nonvolatile memory device and a controller that controls operation of the nonvolatile memory device, the method comprising:
issuing, by the controller, a first command to the nonvolatile memory device; reading, by the nonvolatile memory device, first data from a memory cell array in response to the first command; issuing, by the controller, in a first read mode, a second command for transferring to the controller status information indicating whether a read operation of the memory cell array according to the first command has been completed, and the first data; and transferring, by the nonvolatile memory device to the controller, the first data to the controller in response to the second command, and delaying output of the first data for a first time interval, in a busy status in which the reading of the first data has not been completed.

16 . The method of claim 15 , wherein the delaying further comprises completing, by the nonvolatile memory device, reading the first data from the memory cell array within the first time interval after receiving the second command.

17 . The method of claim 15 , wherein issuing the second command comprises toggling, by the controller, a read enable signal for a second time interval after the second command is issued,
wherein the read enable signal synchronizes a data strobe signal that transfers the first data.

18 . The method of claim 17 , wherein the delaying further comprises:
determining the busy status; and maintaining the data strobe signal at a constant level regardless of the read enable signal.

19 . The method of claim 17 , wherein the nonvolatile memory device outputs the first data at each rising edge and each falling edge of the data strobe signal.

20 . The method of claim 15 , wherein the controller issues the first command and the second command in the first read mode, and issues the first command, a third command for outputting the status information, and a fourth command for transferring the first data in the second read mode.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Park Hyungjoon
• Gong Youngho
• Kim Hyeonwu
• Ahn Seokwon

Classifications

• G06F12/1009

  using page tables, e.g. page table structures · CPC title

• G06F12/0238 Primary

  Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory · CPC title

• G06F3/0656

  Data buffering arrangements · CPC title

• G06F3/0653

  Monitoring storage devices or systems · CPC title

• G06F3/0658 Primary

  Controller construction arrangements · CPC title