Apparatus and method to reduce standby power for systems in battery mode with a connected bus powered device

Patent metadata

Field	Value
Publication number	US-2021208668-A1
Application number	US-202117203561-A
Country	US
Kind code	A1
Filing date	Mar 16, 2021
Priority date	Mar 16, 2021
Publication date	Jul 8, 2021
Grant date	—

Abstract

A power saving apparatus and method for a host system to proactively decide to save power and increase battery life when bus powered peripheral devices are connected to the System's Type-C ports. The Host (or Host System) decides if a Bus Powered Device (BPD), hub or a peripheral device requires application services, or a device-initiated wake based on wake policies of a respective Universal Serial Bus (USB) 3.2, Thunderbolt 3 (TBT3), USB4, Display Port (DP) Protocol. Thereafter, the Host decides based on S0, Low Power System standby entry—wake time latency requirement along with Type-C IO Protocol policies, to trigger the system power delivery (PD) Controller to remove power to the BPD. To save power, the Host System Wake logic power partition is also powered off.

First claim

What is claimed is:

1 . A machine-readable storage media having machine-readable instructions stored there on, that when executed, cause one or more processors to perform a method comprising:
detecting a device connected to a port; enabling power to the device; determining that the device connected to the port is inactive; initiating standby mode by sending standby indication to a power delivery controller; instructing a voltage regulator to reduce power to the device in response to the standby indication; and reducing power to the device.

2 . The machine-readable storage media of claim 1 , having machine-readable instructions stored there on, that when executed, cause the one or more processors to perform a further method comprising:
sending a standby exit indication to an embedded controller or PD controller; and setting current limit for the voltage regulator in response to the standby exit indication.

3 . The machine-readable storage media of claim 1 , wherein the port is a USB Type-C port.

4 . The machine-readable storage media of claim 1 , wherein the device is bus power device or a hub connected system.

5 . The machine-readable storage media of claim 1 , wherein reducing power to the device includes cutting power to a wake logic power plane.

6 . The machine-readable storage media of claim 1 , wherein the device does not use device-initiated wake.

7 . The machine-readable storage media of claim 1 , having machine-readable instructions stored there on, that when executed, cause the one or more processors to perform a further method comprising:
sending a message to reduce or turn off power to the device via a API interface.

8 . The machine-readable storage media of claim 1 , having machine-readable instructions stored there on, that when executed, cause the one or more processors to perform a further method comprising:
reading a flag to determine whether to keep a system wake logic power plane powered on when reducing power to the device.

9 . The machine-readable storage media of claim 8 , wherein the flag is a DEVICE_REMOTE_WAKEUP flag when the device is a USB 3.2 device.

10 . The machine-readable storage media of claim 8 , wherein the flag is a Router Configuration Space Basic Attribute when the device is a USB 4 device.

11 . A system comprising:
a processor; a power delivery controller coupled to the processor; a port coupled to the power delivery controller; an embedded controller coupled to the power delivery controller and the processor; and a voltage regulator coupled to the port, wherein the processor is to:
detect a device connected to the port;
enable power to the device;
determine that the device connected to the port is inactive;
initiate standby mode by sending standby indication to the power delivery controller via the embedded controller; and
instruct the voltage regulator to reduce power to the device in response to the standby indication.

12 . The system of claim 11 , wherein the processor to:
send a standby exit indication to the embedded controller or PD controller; and set current limit for the voltage regulator in response to the standby exit indication.

13 . The system of claim 11 , wherein the port is a USB Type-C port.

14 . The system of claim 11 , wherein the device is bus power device or a hub connected system.

15 . The system of claim 11 , wherein the processor is to cut power to a wake logic power plane.

16 . The system of claim 11 , wherein the processor is to read a flag to determine whether to keep a system wake logic power plane powered on when it is to reduce power to the device.

17 . The system of claim 16 , wherein the flag is a DEVICE_REMOTE_WAKEUP flag when the device is a USB 3.2 device, or wherein the flag is a Router Configuration Space Basic Attribute when the device is a USB 4 device.

18 . An apparatus comprising:
a memory to store instructions; and a processor coupled to the memory, wherein the processor is to execute the instructions which include: detecting a device connected to a port; enabling power to the device; determining that the device connected to the port is inactive; initiating standby mode by sending standby indication to a power delivery controller; instructing a voltage regulator to reduce power to the device in response to the standby indication; and reducing power to the device.

19 . The apparatus of claim 18 , wherein the instructions include:
sending a standby exit indication to an embedded controller; setting current limit for the voltage regulator in response to the standby exit indication; and reading a flag to determine whether to keep a system wake logic power plane powered on when the processor is to reduce power to the device.

20 . The apparatus of claim 18 , wherein the flag is a DEVICE_REMOTE_WAKEUP flag when the device is a USB 3.2 device, or wherein the flag is a Router Configuration Space Basic Attribute when the device is a USB 4 device.

Assignees

• Intel Corp

Inventors

• Natarajan Udaya
• Rajaraman Kannappan

Classifications

• G06F13/4068

  Electrical coupling · CPC title

• G06F9/4418

  Suspend and resume; Hibernate and awake · CPC title

• G06F2213/0042

  Universal serial bus [USB] · CPC title

• G06F1/3296 Primary

  by lowering the supply or operating voltage · CPC title

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title