Display Device and Method of Manufacturing Same

US2021202631A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2021202631-A1
Application numberUS-202017129110-A
CountryUS
Kind codeA1
Filing dateDec 21, 2020
Priority dateDec 31, 2019
Publication dateJul 1, 2021
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device having a bankless structure may comprises: a substrate on which pixels including an emission area and a non-emission area are disposed; a first conductive layer disposed on the substrate, and including a lower electrode of a storage capacitor; an active layer formed on the first conductive layer; a second conductive layer formed on the active layer, and including electrodes of at least one transistor, and an upper electrode of the storage capacitor which is formed in a single pattern with at least one of the electrodes of the at least one transistor; an overcoat layer covering the second conductive layer; and a light-emitting element may be disposed on the overcoat layer, and connected to the upper electrode of the storage capacitor through a via hole, wherein the via hole does not overlap the at least one transistor, when viewed from above.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display device having a bankless structure, the display device comprising: a substrate on which pixels including an emission area and a non-emission area are disposed; a first conductive layer disposed on the substrate, the first conductive layer including a lower electrode of a storage capacitor; an active layer formed on the first conductive layer; a second conductive layer formed on the active layer, the second conductive layer including electrodes of at least one transistor, and an upper electrode of the storage capacitor which is formed in a single pattern with at least one of the electrodes of the at least one transistor; an overcoat layer covering the second conductive layer; and a light-emitting element disposed on the overcoat layer, the light-emitting element connected to the upper electrode of the storage capacitor through a via hole, wherein the via hole does not overlap the at least one transistor in a plan view of the display device. 2 . The display device of claim 1 , wherein the light-emitting element comprises: an anode electrode disposed on the overcoat layer, the anode electrode connected to the upper electrode of the storage capacitor through the via hole; an emission layer covering an entire surface of the anode electrode; and a cathode electrode covering the emission layer. 3 . The display device of claim 1 , further comprising: a light absorption layer disposed under the overcoat layer in the non-emission area, the light absorption layer composed of colorants. 4 . The display device of claim 3 , wherein the light absorption layer comprises at least one among a first absorption layer including a colorant in a first color, and a second absorption layer including a colorant in a second color. 5 . The display device of claim 3 , further comprising: a color filter formed above the second conductive layer in the emission area. 6 . The display device of claim 1 , further comprising: a buffer layer covering the first conductive layer; a gate insulation layer covering the active layer; and a passivation layer covering the second conductive layer. 7 . A display device having a bankless structure, the display device comprising: a substrate on which pixels including an emission area and a non-emission area are disposed; a first conductive layer disposed on the substrate, the first conductive layer including a lower electrode of a storage capacitor; an active layer formed on the first conductive layer; a second conductive layer formed on the active layer, the second conductive layer including electrodes of at least one transistor, and an upper electrode of the storage capacitor which is formed in a single pattern with at least one of the electrodes of the at least one transistor; an overcoat layer covering the second conductive layer; and a light-emitting element disposed on the overcoat layer, the light-emitting element connected to the upper electrode of the storage capacitor through a via hole, wherein the at least one transistor includes a driving transistor that controls an amount of current flowing to the light-emitting element in response to a voltage stored in the storage capacitor, and wherein the driving transistor comprises: a first electrode included in the second conductive layer, the first electrode connected to a power line; a second electrode included in the second conductive layer, the second electrode connected to the lower electrode of the storage capacitor; and a third electrode included in the second conductive layer, formed in a single pattern with the upper electrode of the storage capacitor, the third electrode connected to the light-emitting element via the upper electrode of the storage capacitor. 8 . The display device of claim 7 , wherein the via hole is disposed closer to the emission area than the driving transistor. 9 . The display device of claim 7 , wherein the first conductive layer further includes a light-shielding layer disposed in such a manner that at least a region thereof and the driving transistor overlap. 10 . A display device having a bankless structure, the display device comprising: a substrate on which pixels including an emission area and a non-emission area are disposed; a first conductive layer disposed on the substrate, the first conductive layer including a lower electrode of a storage capacitor; an active layer formed on the first conductive layer; a second conductive layer formed on the active layer, the second conductive layer including electrodes of at least one transistor, and an upper electrode of the storage capacitor which is formed in a single pattern with at least one of the electrodes of the at least one transistor; an overcoat layer covering the second conductive layer; and a light-emitting element disposed on the overcoat layer, the light-emitting element connected to the upper electrode of the storage capacitor through a via hole, wherein the upper electrode is constructed as multiple layers in which a first electrode pattern disposed at the second conductive layer and a second electrode pattern disposed at the active layer overlap. 11 . A display device having a bankless structure, the display device comprising: a substrate on which pixels including an emission area and a non-emission area are disposed; a first conductive layer disposed on the substrate, the first conductive layer including a lower electrode of a storage capacitor; an active layer formed on the first conductive layer; a second conductive layer formed on the active layer, the second conductive layer including electrodes of at least one transistor, and an upper electrode of the storage capacitor which is formed in a single pattern with at least one of the electrodes of the at least one transistor; an overcoat layer covering the second conductive layer; and a light-emitting element disposed on the overcoat layer, the light-emitting element connected to the upper electrode of the storage capacitor through a via hole, wherein among the pixels, an area of the upper electrode and the lower electrode of the pixels displaying a white color is set to be smaller than an area of the upper electrode and the lower electrode of the pixels displaying a red color, a blue color, or a green color. 12 . A display device having a bankless structure, the display device comprising: a substrate on which pixels including an emission area and a non-emission area are disposed; a first conductive layer disposed on the substrate, the first conductive layer including a lower electrode of a storage capacitor; an active layer formed on the first conductive layer; a second conductive layer formed on the active layer, the second conductive layer including electrodes of at least one transistor, and an upper electrode of the storage capacitor which is formed in a single pattern with at least one of the electrodes of the at least one transistor; an overcoat layer covering the second conductive layer; and a light-emitting element disposed on the overcoat layer, the light-emitting element connected to the upper electrode of the storage capacitor through a via hole, wherein the overcoat layer is formed in an area except the emission area of the pixels displaying a white color, among the pixels. 13 . A display device having a bankless structure, the display device comprising: a substrate on which a pixel is disposed, the pixel including an emission area and a circuit area in which circuit elements are disposed, and emitting light in a white color; a first conductive layer disposed on the substrate, the first conductive layer including

Assignees

Inventors

Classifications

  • comprising light absorbing layers, e.g. black layers · CPC title

  • characterised by their shape · CPC title

  • integrated with passive devices, e.g. auxiliary capacitors · CPC title

  • wherein the TFTs are in active matrices · CPC title

  • Electricity · mapped topic

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What does patent US2021202631A1 cover?
A display device having a bankless structure may comprises: a substrate on which pixels including an emission area and a non-emission area are disposed; a first conductive layer disposed on the substrate, and including a lower electrode of a storage capacitor; an active layer formed on the first conductive layer; a second conductive layer formed on the active layer, and including electrodes of …
Who is the assignee on this patent?
Lg Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L27/3248. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jul 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).