Switch control clamping

Patent metadata

Field	Value
Publication number	US-2021194466-A1
Application number	US-202017121480-A
Country	US
Kind code	A1
Filing date	Dec 14, 2020
Priority date	Dec 19, 2019
Publication date	Jun 24, 2021
Grant date	—

Abstract

A method of controlling a switch, including: a) applying a control signal to a control terminal of the switch, said control signal exhibiting at least one first switching between a switch turn-on control state and a switch turn-off control state; and b) applying a switch turn-off potential on said control terminal after a first delay starting at said first switching, the first delay being greater than the turn-off time.

First claim

1 . Method of controlling a switch, comprising:
a) applying a control signal to a control terminal of the switch, said control signal exhibiting at least one first switching between a switch turn-on control state and a switch turn-off control state, the switch switching to an off state within a turn-off time from the first switching; and b) applying a switch turn-off potential to said control terminal after a first delay starting at said first switching, the first delay being longer than the turn-off time, wherein:
the first switching marks the beginning of a first period during which said control signal is only in the turn-off control state;
a second period comprises alternations of states of control of the turning off and the turning on of the switch; and
the first delay is longer than a cycle time of the alternations.

2 . Method according to claim 1 , wherein the first switching forms an edge between a turn-on level and a turn-off level.

3 . Method according to claim 1 , wherein the first delay is shorter than 1% of a duration of the first period, preferably shorter than 0.2% of a duration of the first period, more preferably shorter than 0.05% of the first period.

4 . Method according to claim 1 , wherein:
said control signal exhibits, during said application of the turn-off potential, at last one second switching between the turn-off control state and the turn-on control state; and said application of the turn-off potential is interrupted within a second delay starting at said second switching and shorter than the first delay, the second delay preferably being shorter than approximately 1 μs.

5 . Method according to claim 4 , wherein:
said control signal has, outside of said application of the turn-off potential, a third switching between the turn-off control state and the turn-on control state, the switch switching to an on state within a turn-on time from the third switching; and the second delay is shorter than the turn-on time.

6 . Method according to claim 1 , wherein:
said application of said control signal is performed by means of a link having a first impedance; and during the implementation of said application of the turn-off potential, a second impedance between a node for delivering said turn-off potential and said control terminal is smaller than the first impedance.

7 . Device configured to implement the method according to claim 1 .

8 . Device according to claim 7 , comprising:
another switch coupling said control terminal to a node for delivering said turn-off potential; a capacitive element coupling said delivery node to another control terminal of said another switch; and a resistive element and a diode electrically in parallel between said other control terminal and a node of reception of a signal representative of said control signal.

9 . Device according to claim 8 , wherein said delivery node is defined by a conduction terminal of said switch.

10 . Device according to claim 8 , comprising a capacitive element coupling a conduction terminal of said switch to said delivery node, and a voltage source having two terminals coupled to two terminals of the capacitive element.

11 . Device according to claim 8 , comprising an inverter configured to receive said control signal, said reception node being defined by an output of the inverter.

12 . Device according to claim 7 , comprising a circuit configured to output said control signal.

13 . Circuit intended to be used in a device according to claim 7 , said circuit being configured to:
receive a signal representative of said control signal; implement step b) based on said control signal, said circuit being preferably monolithic, and the device further comprising another circuit configured to implement the step a).

14 . Circuit comprising a circuit according to claim 13 and said switch.

15 . Converter comprising a device according to claim 7 or a circuit according to claim 13 .

Assignees

• Commissariat A Ienergie Atomique Et Aux Energies Alternatives

Inventors

• Lefevre Guillaume
• Perez Gaëtan
• Piquet-Boisson Guillaume

Classifications

• H03K17/162

  without feedback from the output circuit to the control circuit · CPC title

• H03K2017/066

  Maximizing the OFF-resistance instead of minimizing the ON-resistance · CPC title

• H02M1/38

  Means for preventing simultaneous conduction of switches · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H02M7/5387 Primary

  in a bridge configuration · CPC title