Scl parallel decoding method and apparatus and device

Patent metadata

Field	Value
Publication number	US-2021184701-A1
Application number	US-202117186781-A
Country	US
Kind code	A1
Filing date	Feb 26, 2021
Priority date	Aug 30, 2018
Publication date	Jun 17, 2021
Grant date	—

Abstract

Example successive cancellation list (SCL) parallel decoding methods and apparatus are described. One example method includes obtaining L 1 first decoding paths of an (i−1) th group of to-be-decoded bits after received data corresponds to P groups of to-be-decoded bits, where i is an integer, P is an integer greater than 1, 1<i≤P, and L 1 is a positive integer. L 3 third decoding paths is determined for each first decoding path, where a quantity of information bits in an i th group of to-be-decoded bits is n, n is a positive integer greater than or equal to 1, L 3 is a positive integer, and L 3 <2 n . At least one reserved decoding path of the i th group of to-be-decoded bits is determined from L 1 ×L 3 third decoding paths, where the at least one reserved decoding path includes a decoding result of the i th group of to-be-decoded bits.

First claim

1 . A successive cancellation list (SCL) parallel decoding method, wherein received data corresponds to P groups of to-be-decoded bits, and wherein the method comprises:
obtaining L 1 first decoding paths of an (i−1) th group of to-be-decoded bits, wherein i is an integer, wherein P is an integer greater than 1, wherein 1<i≤P, and wherein L 1 is a positive integer; determining L 3 third decoding paths for each first decoding path, wherein a quantity of information bits in an i th group of to-be-decoded bits is n, wherein n is a positive integer greater than or equal to 1, wherein L 3 is a positive integer, and wherein L 3 <2 n ; and determining at least one reserved decoding path of the i th group of to-be-decoded bits from L 1 ×L 3 third decoding paths, wherein the at least one reserved decoding path comprises a decoding result of the i th group of to-be-decoded bits.

2 . The method according to claim 1 , wherein the determining L 3 third decoding paths for each first decoding path comprises:
determining L 3 third decoding paths for each first decoding path when a preset condition is met.

3 . The method according to claim 2 , wherein L 1 ×L 3 is greater than or equal to a first preset threshold.

4 . The method according to claim 3 , wherein the preset condition is:
L 1 ×L 2 is greater than the first preset threshold, wherein L 2 represents a number of second decoding paths for each first decoding path.

5 . The method according to claim 3 , wherein the first preset threshold is any one of 2, 4, 8, 16, 32, 64, or 128.

6 . The method according to claim 1 , wherein the determining L 3 third decoding paths for each first decoding path comprises:
determining L 2 second decoding paths for each first decoding path, wherein L 2 =2 n ; and determining the L 3 third decoding paths from the L 2 second decoding paths corresponding to each first decoding path.

7 . The method according to claim 3 , wherein
L 3 =2 m-k , wherein k is a positive integer, wherein m is a quantity of to-be-decoded bits comprised in each group of to-be-decoded bits, wherein m is an integer greater than 1, and wherein 1≤k<m.

8 . The method according to claim 7 , wherein L 3 =2 m-k comprises:
if L 1 ×2 m-k is greater than or equal to the first preset threshold, L 3 =2 m-k .

9 . The method according to claim 1 , wherein L 3 is any one of 2, 4, 8, 16, 32, or 64.

10 . The method according to claim 1 , wherein when i=P, the method further comprises:
determining, from the at least one reserved decoding path, a decoding path having a highest accuracy rate; and determining a decoding result of the P groups of to-be-decoded bits based on the decoding path having the highest accuracy rate.

11 . An apparatus, comprising:
at least one processor; and one or more memories coupled to the at least one processor and storing programming instructions for execution by the at least one processor to:
obtain L 1 first decoding paths of an (i−1) th group of to-be-decoded bits, wherein i is an integer, wherein P is an integer greater than 1, wherein 1<i≤P, and wherein L 1 is a positive integer;
determine L 3 third decoding paths for each first decoding path, wherein a quantity of information bits in an i th group of to-be-decoded bits is n, wherein n is a positive integer greater than or equal to 1, wherein L 3 is a positive integer, and wherein L 3 <2 n ; and
determine at least one reserved decoding path of the i th group of to-be-decoded bits from L 1 ×L 3 third decoding paths, wherein the at least one reserved decoding path comprises a decoding result of the i th group of to-be-decoded bits.

12 . The apparatus according to claim 11 , wherein the determining L 3 third decoding paths for each first decoding path comprises:
determining L 3 third decoding paths for each first decoding path when a preset condition is met.

13 . The apparatus according to claim 12 , wherein L 1 ×L 3 is greater than or equal to a first preset threshold.

14 . The apparatus according to claim 13 , wherein the preset condition is:
L 1 ×L 2 is greater than the first preset threshold, wherein L 2 represents a number of second decodine paths for each first decodine path.

15 . The apparatus according to claim 13 , wherein the first preset threshold is any one of 2, 4, 8, 16, 32, 64, or 128.

16 . The apparatus according to claim 11 , wherein the determining L 3 third decoding paths for each first decoding path comprises:
determining L 2 second decoding paths for each first decoding path, wherein L 2 =2 n ; and determining the L 3 third decoding paths from the L 2 second decoding paths corresponding to each first decoding path.

17 . The apparatus according to claim 13 , wherein
L 3 =2 m-k , wherein k is a positive integer, wherein m is a quantity of to-be-decoded bits comprised in each group of to-be-decoded bits, wherein m is an integer greater than 1, and wherein 1≤k<m.

18 . The apparatus according to claim 17 , wherein L 3 =2 m-k comprises:
if L 1 ×2 m-k is greater than or equal to the first preset threshold, L 3 =2 m-k .

19 . The apparatus according to claim 11 , wherein L 3 is any one of 2, 4, 8, 16, 32, or 64.

20 . The apparatus according to claim 11 , wherein when i=P, the method further comprises:
determining, from the at least one reserved decoding path, a decoding path having a highest accuracy rate; and determining a decoding result of the P groups of to-be-decoded bits based on the decoding path having the highest accuracy rate.

Assignees

• Huawei Tech Co Ltd

Inventors

• Ma Liang
• Li Hang
• Wei Yuejun

Classifications

• H03M13/13

  Linear codes · CPC title

• H04L1/0045 Primary

  Arrangements at the receiver end · CPC title

• H03M13/45

  Soft decoding, i.e. using symbol reliability information (H03M13/41 takes precedence) · CPC title

• H03M13/43

  Majority logic or threshold decoding · CPC title

• H04L1/0052

  Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables · CPC title