Variable width superblock addressing

Patent metadata

Field	Value
Publication number	US-2021181940-A1
Application number	US-201716077175-A
Country	US
Kind code	A1
Filing date	Dec 13, 2017
Priority date	Dec 13, 2017
Publication date	Jun 17, 2021
Grant date	—

Abstract

Devices and techniques for variable width superblock addressing are described herein. A superblock width, specified in number of planes, is obtained. A superblock entry is created in a translation table of a NAND device. Here, the superblock entry may include a set of blocks, from the NAND device, that have the same block indexes across multiple die of the NAND device. The number of unique block indexes are equal to the number of planes and in different planes. A request, received from a requesting entity, is performed using the superblock entry. Performing the request includes providing a single instruction to multiple die of the NAND device and multiple data segments. Here, a data segment corresponds to a block in the set of blocks specified by a tuple of block index and die. A result of the request is then returned to the requesting entity.

First claim

1 . A NAND device for variable width superblock addressing in NAND, the NAND device comprising:
A NAND array; and a controller to:
obtain a superblock width specified in number of planes;
create a superblock entry in a translation table of the NAND device, the superblock entry including a set of blocks from the NAND array, the set of blocks having block indexes that are the same across multiple die of the NAND array, with a number of unique block indexes equal to the number of planes and in different planes;
receive a request from a requesting entity;
perform the request, to produce a result, using the superblock entry through:
a single instruction to multiple die of the NAND device; and
multiple data segments, a data segment in the multiple data segments corresponding to a block in the set of blocks specified by a tuple of block index and die; and

return the result to the requesting entity.

2 . The NAND device of claim 1 , wherein the number of planes are specified as a percentage.

3 . The NAND device of claim 2 , wherein the percentage is fifty percent.

4 . The NAND device of claim 1 , wherein the number of planes is less than planes in a die of the NAND array.

5 . The NAND device of claim 4 , wherein a complete superblock includes a block at a unique index for every plane in the die and spans all die of the NAND array.

6 . The NAND device of claim 5 , wherein user data is stored in a complete superblock and NAND device meta data is stored in the superblock.

7 . The NAND device of claim 4 , wherein the superblock is one of a set of superblocks, the set of superblocks including a block at a unique index for every plane in the die across all die of the NAND array.

8 . The NAND device of claim 7 , wherein the superblock is differentiated from other members in the set of superblocks by a position of planes represented in the set of blocks.

9 . The NAND device of claim 8 , wherein the set of superblocks has two members and the position of planes is high or low, high corresponding to one half of the planes with high indices and low corresponding to remaining planes on the die.

10 . The NAND device of claim 1 , wherein the request is one of a write, a read, a refresh, or garbage collection.

11 . A method for variable width superblock addressing in NAND, the method comprising:
obtaining a superblock width specified in number of planes; creating a superblock entry in a translation table of a NAND device, the superblock entry including a set of blocks from the NAND device, the set of blocks having block indexes that are the same across multiple die of the NAND device, with a number of unique block indexes equal to the number of planes and in different planes; receiving a request from a requesting entity; performing the request, to produce a result, using the superblock entry by providing:
a single instruction to multiple die of the NAND device; and
multiple data segments, a data segment in the multiple data segments corresponding to a block in the set of blocks specified by a tuple of block index and die; and
returning the result to the requesting entity.

12 . The method of claim 11 , wherein the number of planes are specified as a percentage.

13 . The method of claim 12 , wherein the percentage is fifty percent.

14 . The method of claim 11 , wherein the number of planes is less than planes in a die of the NAND device.

15 . The method of claim 14 , wherein a complete superblock includes a block at a unique index for every plane in the die and spans all die of the NAND device.

16 . The method of claim 15 , wherein user data is stored in a complete superblock and NAND device meta data is stored in the superblock.

17 . The method of claim 14 , wherein the superblock is one of a set of superblocks, the set of superblocks including a block at a unique index for every plane in the die across all die of the NAND device.

18 . The method of claim 17 , wherein the superblock is differentiated from other members in the set of superblocks by a position of planes represented in the set of blocks.

19 . The method of claim 18 , wherein the set of superblocks has two members and the position of planes is high or low, high corresponding to one half of the planes with high indices and low corresponding to remaining planes on the die.

20 . The method of claim 11 , wherein the request is one of a write, a read, a refresh, or garbage collection.

21 . A machine readable medium including instructions for variable width superblock addressing in NAND, the instructions, when executed by a machine, cause the machine to perform operations comprising:
obtaining a superblock width specified in number of planes; creating a superblock entry in a translation table of a NAND device, the superblock entry including a set of blocks from the NAND device, the set of blocks having block indexes that are the same across multiple die of the NAND device, with a number of unique block indexes equal to the number of planes and in different planes; receiving a request from a requesting entity; performing the request, to produce a result, using the superblock entry by providing:
a single instruction to multiple die of the NAND device; and
multiple data segments, a data segment in the multiple data segments corresponding to a block in the set of blocks specified by a triple of block index and die; and
returning the result to the requesting entity.

22 . The machine readable medium of claim 21 , wherein the number of planes are specified as a percentage.

23 . The machine readable medium of claim 22 , wherein the percentage is fifty percent.

24 . The machine readable medium of claim 21 , wherein the number of planes is less than planes in a die of the NAND device.

25 . The machine readable medium of claim 24 , wherein a complete superblock includes a block at a unique index for every plane in the die and spans all die of the NAND device.

26 . The machine readable medium of claim 25 , wherein user data is stored in a complete superblock and NAND device meta data is stored in the superblock.

27 . The machine readable medium of claim 24 , wherein the superblock is one of a set of superblocks, the set of superblocks including a block at a unique index for every plane in the die across all die of the NAND device.

28 . The machine readable medium of claim 27 , wherein the superblock is differentiated from other members in the set of superblocks by a position of planes represented in the set of blocks.

29 . The machine readable medium of claim 28 , wherein the set of superblocks has two members and the position of planes is high or low, high corresponding to one half of the planes with high indices and low corresponding to remaining planes on the die.

30 . The machine readable medium of claim 21 , wherein the request is one of a write, a read, a refresh, or garbage collection.

Assignees

• Micron Technology Inc

Inventors

• Cui Zhao
• Yuen Eric
• Wang guan zhong
• Duan Xinghui
• Li Hua Chen

Classifications

• G06F2212/1044

  Space efficiency improvement · CPC title

• G06F12/0246 Primary

  in block erasable memory, e.g. flash memory · CPC title

• G06F3/0604

  Improving or facilitating administration, e.g. storage management · CPC title

• G06F2212/7201

  Logical to physical mapping or translation of blocks or pages · CPC title

• G06F3/064 Primary

  Management of blocks · CPC title