Printed circuit board and method for manufacturing printed circuit board

Patent metadata

Field	Value
Publication number	US-2021153358-A1
Application number	US-201917048806-A
Country	US
Kind code	A1
Filing date	Mar 7, 2019
Priority date	May 11, 2018
Publication date	May 20, 2021
Grant date	—

Abstract

A printed circuit board according to an embodiment of the present disclosure includes a base film having an insulating property, and a conductive pattern that is stacked on at least one surface of the base film and that includes a plurality of wiring parts arranged in parallel. The plurality of wiring parts have an average width of 5 μm or more and 15 μm or less. The plurality of wiring parts have an electroless plating layer and an electroplating layer stacked on the electroless plating layer. A void density at an interface between the electroless plating layer and the electroplating layer in a section of the plurality of wiring parts in a thickness direction is 0.01 μm2/μm or less.

First claim

1 . A printed circuit board comprising:
a base film having an insulating property; and a conductive pattern that is stacked on at least one surface of the base film and that includes a plurality of wiring parts arranged in parallel, wherein the plurality of wiring parts have an average width of 5 μm or more and 15 μm or less, the plurality of wiring parts have an electroless plating layer and an electroplating layer stacked on the electroless plating layer, and a void density at an interface between the electroless plating layer and the electroplating layer in a section of the plurality of wiring parts in a thickness direction is 0.01 μm 2 /μm or less.

2 . The printed circuit board according to claim 1 , wherein a maximum area of a void formed at the interface is 0.01 μm 2 or less.

3 . The printed circuit board according to claim 1 , wherein an average spacing of the plurality of wiring parts is 5 μm or more and 15 μm or less.

4 . The printed circuit board according to claim 1 , wherein the electroless plating layer and the electroplating layer contain copper as a main component.

5 . A method for manufacturing a printed circuit board, comprising a step of forming, by a semi-additive method, a conductive pattern including a plurality of wiring parts arranged in parallel on at least one surface of a base film having an insulating property, wherein the step of forming includes
an electroless plating step of subjecting the one surface of the base film to electroless plating, a resist pattern-forming step of forming a resist pattern having an inverted shape of the plurality of wiring parts on a surface of an electroless plating layer formed in the electroless plating step, a plasma treatment step of subjecting surfaces of the resist pattern and the electroless plating layer after the resist pattern-forming step to plasma treatment, and an electroplating step of subjecting the surface of the electroless plating layer after the plasma treatment step to electroplating, the plurality of wiring parts have an average width of 5 μm or more and 15 μm or less, and an amount of ashing of the resist pattern through the plasma treatment step is 60 nm or more and 300 nm or less.

6 . The method for manufacturing a printed circuit board according to claim 5 , wherein an initial current density in the electroplating step is 0.003 A/m 2 or more and 0.015 A/m 2 or less.

Assignees

• Sumitomo Electric Industries

Inventors

• Sakai Shoichiro
• Imazaki Eiko
• Nitta Koji

Classifications

• H05K1/09

  Use of materials for the {conductive, e.g. } metallic pattern · CPC title

• H05K2203/095

  Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes · CPC title

• H05K2201/09236

  Parallel layout · CPC title

• H05K3/108

  by semi-additive methods; masks therefor (characterised by metallic etch mask H05K3/062; electroplating methods or apparatus H05K3/241) · CPC title

• C25D5/022

  using masking means · CPC title