Batch Diffusion Soldering and Electronic Devices Produced by Batch Diffusion Soldering

Patent metadata

Field	Value
Publication number	US-2021143123-A1
Application number	US-201916679414-A
Country	US
Kind code	A1
Filing date	Nov 11, 2019
Priority date	Nov 11, 2019
Publication date	May 13, 2021
Grant date	—

Abstract

A method of batch soldering includes: forming a soldered joint between a metal region of a first semiconductor die and a metal region of a substrate using a solder preform via a soldering process which does not apply pressure directly to the first semiconductor die, the solder preform having a maximum thickness of 30 μm and a lower melting point than the metal regions; setting a soldering temperature of the soldering process so that the solder preform melts and fully reacts with the metal region of the first semiconductor die and the metal region of the substrate to form one or more intermetallic phases throughout the entire soldered joint, each intermetallic phase having a melting point above the preform melting point and the soldering temperature; and soldering a second semiconductor die to the same or different metal region of the substrate, without applying pressure directly to the second semiconductor die.

First claim

What is claimed is:

1 . A method of batch soldering, comprising:
forming a first soldered joint between a metal region of a first semiconductor die and a first metal region of a substrate using a first solder preform via a soldering process which does not apply pressure directly to the first semiconductor die, the first solder preform having a maximum thickness of 30 μm and a lower melting point than both the metal region of the first semiconductor die and the first metal region of the substrate; setting a soldering temperature of the soldering process so that the first solder preform melts and fully reacts with the metal region of the first semiconductor die and the first metal region of the substrate to form one or more intermetallic phases throughout the entire first soldered joint, each of the one or more intermetallic phases having a melting point above the melting point of the preform and the soldering temperature; and soldering a second semiconductor die to the first or different metal region of the substrate, without applying pressure directly to the second semiconductor die.

2 . The method of claim 1 , wherein the second semiconductor die is soldered to the substrate via the same soldering process used to form the first soldered joint.

3 . The method of claim 1 , wherein soldering the second semiconductor die to the substrate comprises:
forming a second soldered joint between a metal region of the second semiconductor die and the first or different metal region of the substrate using the first solder preform or a second solder preform, via the same soldering process used to form the first soldered joint and without applying pressure directly to the second semiconductor die.

4 . The method of claim 3 , wherein the soldering temperature of the soldering process is set so that the solder preform used to form the second soldered joint melts and fully reacts with the metal region of the second semiconductor die and the first or different metal region of the substrate during the soldering process, to form one or more intermetallic phases throughout the entire second soldered joint.

5 . The method of claim 3 , wherein the second soldered joint is formed using the second solder preform, wherein the second solder preform is thicker than the first solder preform, and wherein the second soldered joint is devoid of intermetallic phases in a middle part of the second soldered joint.

6 . The method of claim 3 , wherein the second soldered joint is formed using the second solder preform, and wherein the second soldered joint is between the metal region of the second semiconductor die and the first metal region of the substrate.

7 . The method of claim 1 , wherein soldering the second semiconductor die to the substrate comprises:
applying a solder paste to a metal region of the second semiconductor die and/or to the first or different metal region of the substrate; and reflowing the solder paste to form a second soldered joint between the metal region of the second semiconductor die and the first or different metal region of the substrate, without applying pressure directly to the second semiconductor die.

8 . The method of claim 7 , wherein the solder paste is reflowed at the same time that the first soldered joint is formed.

9 . The method of claim 7 , wherein the solder paste is reflowed after the first soldered joint is formed, and wherein the first soldered joint has a melting point above a reflow temperature of the solder paste so that the first soldered joint does not melt during reflowing of the solder paste.

10 . The method of claim 1 , further comprising:
soldering a connector to the substrate, without applying pressure directly to the connector.

11 . The method of claim 10 , wherein soldering the connector to the substrate comprises:
forming a soldered joint between the connector and the first or different metal region of the substrate using the first solder preform or a second solder preform, via the same soldering process used to form the first soldered joint and without applying pressure directly to the connector.

12 . The method of claim 10 , wherein soldering the connector to the substrate comprises:
applying a solder paste to the connector and/or to the first or different metal region of the substrate; and reflowing the solder paste to form a soldered joint between the connector and the first or different metal region of the substrate, without applying pressure directly to the connector.

13 . The method of claim 1 , further comprising:
soldering a third semiconductor die to a side of the first or the second semiconductor die facing away from the substrate, without applying pressure directly to the third semiconductor die.

14 . The method of claim 13 , wherein soldering the third semiconductor die to the side of the first or the second semiconductor die facing away from the substrate comprises:
forming a soldered joint between a metal region of the third semiconductor die facing the substrate and a metal region of the first or the second semiconductor die facing away from the substrate using an additional solder preform, and without applying pressure directly to the third semiconductor die.

15 . The method of claim 13 , wherein soldering the third semiconductor die to the side of the first or the second semiconductor die facing away from the substrate comprises:
applying a solder paste to a metal region of the third semiconductor die facing the substrate and/or to a metal region of the first or the second semiconductor die facing away from the substrate; and reflowing the solder paste to form a soldered joint between the third semiconductor die and the first or the second semiconductor die, without applying pressure directly to the third semiconductor die.

16 . The method of claim 1 , further comprising:
soldering a metal clip to a side of the first or the second semiconductor die facing away from the substrate, without applying pressure directly to the metal clip.

17 . The method of claim 16 , wherein soldering the metal clip to the side of the first or the second semiconductor die facing away from the substrate comprises:
forming a soldered joint between the metal clip and a metal region of the first or the second semiconductor die facing away from the substrate using an additional solder preform, and without applying pressure directly to the metal clip.

18 . The method of claim 16 , wherein soldering the metal clip to the side of the first or the second semiconductor die facing away from the substrate comprises:
applying a solder paste to the metal clip and/or to a metal region of the first or the second semiconductor die facing away from the substrate; and reflowing the solder paste to form a soldered joint between the metal clip and the first or the second semiconductor die, without applying pressure directly to the metal clip.

19 . An electronic device, comprising:
a first semiconductor die having a metal region; a substrate having a plurality of metal regions; a first soldered joint between the metal region of the first semiconductor die and a first metal region of the substrate, the first soldered joint having one or more intermetallic phases throughout the entire soldered joint, each of the one or more intermetallic phases formed from a solder preform diffused into the metal region of the first semiconductor die and the first metal region of the substrate; and a second semiconductor die soldered to the first or different metal region of the substrate.

Assignees

• Infineon Technologies Austria Ag

Inventors

• Trunov Kirill
• Heinrich Alexander
• Roesl Konrad
• Unrau Arthur

Classifications

• H10W90/764

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/07653

  changes in shapes · CPC title

• H10W72/0198 Primary

  batch processes · CPC title

• H10W72/07173

  Means for moving chips, wafers or other parts, e.g. conveyor belts · CPC title

• H10W72/886

  Die-attach connectors and strap connectors · CPC title