Manufacturing method of display substrate, display substrate and display device

Patent metadata

Field	Value
Publication number	US-2021111199-A1
Application number	US-202017007568-A
Country	US
Kind code	A1
Filing date	Aug 31, 2020
Priority date	Oct 10, 2019
Publication date	Apr 15, 2021
Grant date	—

Abstract

The present disclosure provides a manufacturing method of a display substrate, a display substrate and a display device, belongs to the field of display technology, and can at least partially solve a problem of residual sand in the display substrate. The manufacturing method of the display substrate includes: providing a base; forming a passivation layer on a surface of the base; forming an amorphous oxide conductive material layer on a surface of the passivation layer facing away from the base; forming a photoresist pattern on the oxide conductive material layer, the photoresist pattern having an exposure region; etching a portion of the oxide conductive material layer in the exposure region of the photoresist pattern to form a hollow position exposing a portion of the passivation layer; and removing a certain thickness material of the portion of the passivation layer exposed through the hollow position.

First claim

What is claimed is:

1 . A manufacturing method for a display substrate, comprising:
providing a base; forming a passivation layer on a surface of the base; forming an amorphous oxide conductive material layer on a surface of the passivation layer facing away from the base; forming a photoresist pattern on a surface of the oxide conductive material layer facing away from the base, wherein the photoresist pattern has an exposure region, and a portion of photoresist in the exposure region is removed and a portion of the oxide conductive material layer at a position corresponding to the exposure region is exposed; etching the portion of the oxide conductive material layer in the exposure region of the photoresist pattern to form a hollow position exposing a portion of the passivation layer; and removing a certain thickness material of the portion of the passivation layer exposed through the hollow position.

2 . The manufacturing method according to claim 1 , wherein the passivation layer comprises a first passivation sub-layer and a second passivation sub-layer which are stacked and made of a same material, the second passivation sub-layer is more compact than the first passivation sub-layer, and wherein the first passivation sub-layer is further away from the base than the second passivation sub-layer, and wherein
the removing the certain thickness material of the portion of the passivation layer exposed through the hollow position comprises: removing at least a certain thickness material of a portion of the first passivation sub-layer exposed through the hollow position.

3 . The manufacturing method according to claim 2 , wherein the removing the certain thickness material of the portion of the first passivation sub-layer exposed through the hollow position comprises: completely removing the portion of the first passivation sub-layer exposed through the hollow position.

4 . The manufacturing method according to claim 2 , wherein the portion of the oxide conductive material layer in the exposure region of the photoresist pattern is wet etched by using a first etching solution.

5 . The manufacturing method according to claim 4 , wherein the removing the certain thickness material of the portion of the first passivation sub-layer exposed through the hollow position comprises: performing a wet etching on the portion of the first passivation layer exposed through the hollow position by using a second etching solution.

6 . The manufacturing method according to claim 5 , wherein the passivation layer is made of silicon oxide or silicon nitride, the oxide conductive material layer is wet-etched by using the first etching solution, and the first etching solution and the second etching solution have a same composition and both contain hydrofluoric acid.

7 . The manufacturing method according to claim 5 , wherein a mass ratio a of hydrofluoric acid to the second etching solution satisfies: 0.15%≤a≤0.45%.

8 . The manufacturing method according to claim 2 , wherein the removing the certain thickness material of the portion of the first passivation sub-layer exposed through the hollow position comprises:
etching a preset depth of the first passivation sub-layer exposed through the hollow position by adopting an anisotropic plasma etching process, and then stopping etching; and etching the remaining material of the first passivation sub-layer by adopting an isotropic plasma etching process.

9 . The manufacturing method according to claim 8 , wherein the isotropic plasma etching process and the anisotropic plasma etching process use a same process gas; a bias power for the isotropic plasma etching process is smaller than a source power; a bias power for the anisotropic plasma etching process is greater than or equal to the source power.

10 . The manufacturing method according to claim 8 , wherein the isotropic plasma etching process and the anisotropic plasma etching process use a same process gas, a source power for the isotropic plasma etching process is the same as a source power for the anisotropic plasma etching process, and a bias power for the isotropic plasma etching process is less than a bias power for the anisotropic plasma etching process.

11 . The manufacturing method according to claim 8 , wherein a material of the passivation layer comprises silicon oxide or silicon nitride, a process gas used in the anisotropic plasma etching process and the isotropic plasma etching process comprises SF 6 and Cl 2 .

12 . The manufacturing method according to claim 11 , wherein the source power is 30 KW, the bias power for the anisotropic plasma etching process is 30 KW, and the bias power for the isotropic plasma etching process is 15 KW.

13 . The manufacturing method according to claim 11 , wherein gas flow rates of SF 6 and Cl 2 are 800 sccm and 8000 sccm, respectively.

14 . A display substrate, comprising a base, a passivation layer arranged on a surface of the base, and an oxide conductive material layer arranged on a surface of the passivation layer facing away from the base;
the oxide semiconductor layer has a patterned hollow region; the passivation layer has a groove at a position corresponding to the hollow region of the oxide conductive material layer, and a groove bottom of the groove is located in the passivation layer.

15 . The display substrate according to claim 14 , wherein the passivation layer comprises a first passivation sub-layer and a second passivation sub-layer which are stacked, the first passivation sub-layer and the second passivation sub-layer are made of a same material, and the second passivation sub-layer is more compact than the first passivation sub-layer, wherein the first passivation sub-layer is further away from the base than the second passivation sub-layer, and the groove bottom of the groove is located at an interface between the first passivation sub-layer and the second passivation sub-layer or within the first passivation sub-layer.

16 . A display device, comprising: the display substrate of claim 14 .

17 . A display device, comprising: the display substrate of claim 15 .

Assignees

• Hefei Xinsheng Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Chen Lin
• Yang Chengshao
• Ma Tao
• Wang Dengfeng
• Han Ling

Classifications

• H10P50/667

  by liquid etching only · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/242 Primary

  of Group IV materials · CPC title

• H10P50/694

  characterised by their behaviour during the process, e.g. soluble masks or redeposited masks · CPC title

• H10K59/8051

  Anodes · CPC title