Imaging systems with improved circuitry to provide boosted control signals

US2021058576A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2021058576-A1
Application numberUS-202016947012-A
CountryUS
Kind codeA1
Filing dateJul 15, 2020
Priority dateAug 21, 2019
Publication dateFeb 25, 2021
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An image sensor having rows and columns of image pixels may include row control circuitry that controls voltages that are sent to each row of the image pixels. The row control circuitry may include booster circuitry that converts a positive power supply voltage (such as 2.8V) to voltages that are negative or otherwise less than the positive power supply voltage and/or greater than the positive power supply voltage. The booster circuitry may have a plurality of switches that control an input to an amplifier, thereby allowing the circuitry to produce any desired voltage in a given range. The booster circuitry output may be shared between multiple rows of the image pixels, and the produced boosted circuitry may be fed to any desired one or more of the rows of image pixels.

First claim

Opening claim text (preview).

What is claimed is: 1 . An image sensor comprising: an array of imaging pixels having rows and columns of pixels; and row control circuitry coupled to the rows of pixels, wherein the row control circuitry comprises booster circuitry that is shared between multiple rows of pixels and the booster circuitry comprises: a first plurality of switches coupled to ground and power supply sources; an amplifier with first and second inputs and an output, wherein the first input is coupled to a first reference voltage; a second plurality of switches coupled to the output of the amplifier; a first capacitor coupled between the first plurality of switches and the second plurality of switches; a second capacitor; a third plurality of switches coupled between the first plurality of switches and the second capacitor; a fourth plurality of switches coupled between the second capacitor and the second input of the amplifier; and an output switch, wherein a node is interposed between the first plurality of switches and the output switch and wherein the third plurality of switches is coupled to the node. 2 . The image sensor defined in claim 1 wherein the first plurality of switches comprises: a first switch coupled to a first additional node that is between the output of the amplifier and the output switch, wherein the first switch is coupled to the power supply voltage; and a second switch coupled to a second additional node, wherein the first additional node is between the second additional node and the output switch, and wherein the second switch is coupled to ground. 3 . The image sensor defined in claim 2 wherein the second plurality of switches comprises: a third switch coupled between the first capacitor and the power supply voltage, wherein the third switch is coupled to the power supply voltage; and a fourth switch coupled to a third additional node between the first capacitor and the output of the amplifier, wherein the fourth switch is coupled to ground. 4 . The image sensor defined in claim 3 wherein the third plurality of switches comprises: a fifth switch coupled to a fourth additional node that is between the first node and the output switch, wherein the second capacitor is coupled between the fifth switch and the second input of the amplifier; a sixth switch coupled to a fifth additional node between the fifth switch and the second capacitor, wherein the sixth switch is coupled to a second reference voltage; and a seventh switch coupled to a sixth additional node between the fifth node and the second capacitor, wherein the seventh switch is coupled to ground. 5 . The image sensor defined in claim 4 wherein the fourth plurality of switches comprises: eight and ninth switches coupled in parallel to a second node between the second capacitor and the second input of the amplifier, wherein the eight switch is coupled to ground and wherein the ninth switch is coupled to the second reference voltage. 6 . The image sensor defined in claim 5 wherein the output switch is coupled to an output node, the booster circuitry further comprising a third capacitor coupled to the output node. 7 . The image sensor defined in claim 6 wherein the power supply voltage is 2.8V. 8 . The image sensor defined in claim 7 , wherein the second switch, the third switch, the seventh switch, and the ninth switch are configured to be on during pre-charge operations to output a voltage between −1.0V and 0V from the booster circuitry. 9 . The image sensor defined in claim 7 , wherein the second switch, the fourth switch, the seventh switch, and the eighth switch are configured to be on during pre-charge operations to output a voltage between 0V and 2.0V from the booster circuitry. 10 . The image sensor defined in claim 7 , wherein the second switch, the fourth switch, the sixth switch, and the eighth switch are configured to be on during pre-charge operations to output a voltage above 2.0V from the booster circuitry. 11 . The image sensor defined in claim 7 , wherein the first switch, the fourth switch, the eighth switch, and at least one of the fifth switch and the sixth switch are configured to be on during pre-charge operations to output a voltage above 2.8V from the booster circuitry. 12 . A method of operating an image sensor having an array of pixels arranged in rows and columns, and row control circuitry that includes booster circuitry that is shared between multiple rows of the pixels, the method comprising: pre-charging the booster circuitry by turning on desired switches within the circuitry and connecting a first input of an amplifier within the circuitry to a power supply voltage; disconnecting the switches and supplying a reference voltage to a second input of the amplifier to output a boosted output voltage from the amplifier; and directing the boosted output voltage to one or more of the rows of pixels using switches that correspond to the respective one or more of the rows of pixels. 13 . The method defined in claim 12 wherein connecting the first input of the amplifier to the power supply voltage comprises connecting the first input to a positive power voltage and wherein disconnecting the switches and supplying the reference voltage to the second input of the amplifier to output the boosted output voltage from the amplifier comprises outputting a negative boosted output voltage. 14 . The method defined in claim 12 wherein connecting the first input of the amplifier to the power supply voltage comprises connecting the first input to 2.8V and wherein disconnecting the switches and supplying the reference voltage to the second input of the amplifier to output the boosted output voltage from the amplifier comprises outputting a voltage greater than 2.8V. 15 . An image sensor comprising: an array of imaging pixels having rows and columns of pixels; and row control circuitry coupled to the rows of pixels, wherein the row control circuitry comprises booster circuitry that is shared between multiple rows of pixels, wherein the booster circuitry comprises an amplifier and a plurality of switches that are configured to produce an output voltage from a power supply voltage, and wherein the switches are configured to be placed in a first mode during pre-charge operations to output a first voltage with the booster circuitry, to be placed in a second mode during pre-charge operations to output a second voltage that is different from the first voltage, to be placed in a third mode during pre-charge operations to output a third voltage that is different from the first and second voltages, and to be places in a fourth mode during pre-charge operations to output a fourth voltage that is different from the first, second, and third voltages. 16 . The image sensor defined in claim 15 wherein the power supply voltage is 2.8V. 17 . The image sensor defined in claim 16 wherein the first voltage is between −1.0V and 0V. 18 . The image sensor defined in claim 17 wherein the second voltage is 0V to 2.0V, the third voltage is greater than 2.0V, and the fourth voltage is greater than 2.8V. 19 . The image sensor defined in claim 15 wherein the power supply voltage is a positive voltage, the first voltage is a negative voltage, and the fourth voltage is greater than the power supply voltage. 20 . The image sensor defined in claim 19 wherein each row of pixels has a switch coupled to the booster circuitry, and wherein the output voltage is configured to be fed to a respective row of pixels by tu

Assignees

Inventors

Classifications

  • H04N25/709Primary

    Circuitry for control of the power supply · CPC title

  • Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

  • Circuitry for scanning or addressing the pixel array · CPC title

  • comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power · CPC title

  • Circuitry for scanning or addressing the pixel array · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2021058576A1 cover?
An image sensor having rows and columns of image pixels may include row control circuitry that controls voltages that are sent to each row of the image pixels. The row control circuitry may include booster circuitry that converts a positive power supply voltage (such as 2.8V) to voltages that are negative or otherwise less than the positive power supply voltage and/or greater than the positive …
Who is the assignee on this patent?
Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification H04N25/709. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Feb 25 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).